shifter / video timings

[exxos]

Yeah saw those links yesterday, I know the pulse idea would be tricky as it needs a "pulse skipper", just using every other pulse for V sync, that will re-create the 50hz, H sync, same kinda thing, not sure about blanking, but really the syncs need to be moved onto a new circuit which can replicate the timings. I have seen a site which does it with counters, though really need to find a better way of generating the syncs and keeping the shifter running at its normal speeds. At that point either way seems like a lot of work, but it is possible, just a bit beyond my level of thinking at the moment.

EDIT , it seems the ST clock generator (32mhz) isn't capable of running at 64mhz, even though the shifter can accept a 68mhz input. So I will have to repeat the 64mhz test again. After scoping the bus, its actually running slow, 8mhz becomes 5.33mhz. Will be a few days to get a 64mhz clock, but will try that out as the 68mhz only looked a fraction off anyway. Even so I am going to work on only running the MMU and CPU on 16mhz bus speed, not sure if it will work or not, but can only try.

The max bus speed so far is about 16.7mhz. I am going to try pushing this further to see what the max speeds of the CPU and MMU are in due course

[exxos]

66mhz-div.JPG

Odd thing is its a 66mhz input to the shifter (normally 32) so the double rate would be 64mhz, though I dont have a 64mhz osc to hand at the moment. The MMU clock outputs are going via a /2 chip so the only thing in theory going faster is the MMU, SHIFTER,CPU. The ST crashes when trying to load from the floppy, but im supprised it got a image at 66mhz. 64mhz would give a proper divide down to 16mhz for a 1.44 floppy, so its probably 17mhz into 16mhz bus, or 66mhz may just be too high, will order a 64mhz osc and try it out.

Also seems the osc chips only outputting 3volts at best, some look like 2 volts, this isn't enough to drive the MMU properly. The onboard (ST) 32mhz clock gen is rubbish, a 64mhz crystal causes the bus to half in speed!! So a clean clock is the way to go. Also I feel its a much sharper image using a better clock input. The shifter does a great job at buffering the clock. The 32mhz is still only about 3V, put it outputs a nice 5V(ish) clock. Seperating any clocks on the ST bus is just a bad idea. While it does boot, it does not work well at all. With my current setup everything is in sync from a 66mhz master clock.

What I really need is a good 32mhz 5V osc circuit. Then I can feed the shifter with that, and bypass its clock output and feed that direct with 32mhz also. hopefully it will solve the "double image" on the H scanlines and bring it back to normality in that respect. V sync will still be twice the speed, so only going to get half the picture on the screen, but will have to sort that out another time.

Next up I just need to get things synced with 64mhz, though I have a feeling im going to loose sync again, but wont know until its tried. At the moment the pixel clock is going double speed and the V sync is. Then need a benchmark program, I saw gembench3 someone, so will have to get that onto a floppy, even with the screen a bit messed up, i should still be able to speed test the CPU and MMU/RAM at 200% speed

The 244 and 373 buffers I replaced with ALS / ABT types, both faster than the LS, I think one type maybe the ABT is good for 200mhz! I just mixed them due to them being cheaper options after LS. I don't feel they need changing, they should be good for 25mhz or so, but I upped this to at least 40mhz now, so no problems with speed on the buffers.

The ROM's don't work well at 16mhz bus, So I am using , I presume 150 or 100nS EPROMS. It improved things a fraction so its a good move.

More news towards the end of the week hopefully

[Poobah]

Hey exxos,

I applaud your tinkering efforts, its good to poke around and experiment.

That said, you are unlikely to get any kind of usable result messing with the shifter clock like this.

first and foremost, these chips are only so fast (they are OLD tech), you are probably violating all kinds of setup and hold times with such high clock speeds. I'm surprised you got to the desktop before it puked. Even if you happened upon some timings that produced valid HSync and Vsync, the system will not be reliable.

second, the ST video signal is a carefully choreographed dance between GLUE, Shifter and the MMU (and the CPU and busses). The signals are rather non-standard, but they are 'close enough'. As soon as you change the 32 MHz clock, all that goes out the window, as the relationships are not linear

Shifter is actually a rather dumb chip. All he does is grab data from memory when he is told, stuff it in some internal registers, then shift register bits on the pixel clock (which, is why we call him Shifter!) Shifter has to be properly synced with GLUE or your pixel data won't match your sync signals. You can see this in your last picture.... shifter is merrily clocking out pixels at double speed, putting 2 image scan lines on a single monitor scan line.

There's only a couple ways we'll ever get a decent low/med res VGA screen out of an ST (trust me, I've explored them).

0) come up with a circuit to produce 'standard' sync signals from the mess coming out of GLUE. That would allow something like an AD725 to work properly.
1) Build an ST specific scan doubler that 'knows' about the goofy sync signals and can process them correctly
2) Pop out shifter and replace him with an FPGA, grab the syncs from GLUE and process them in the FPGA as well
3) Do an FPGA with GLUE and Shifter so you can control the sync generation.

I'm working on #1 on and off. I looked at #2 for a bit, still think that's viable as well.

[nativ]

4) Build a Raspberry Pi into the ST in the fashion of a ATonce 286 or PC Speed board and output the ST through that

[Cyprian]

exxos thats cool
can you show us photo of this modification? I'd like to try the same modification on my ST

[exxos]

MOD1.JPG

Its not a mod, its a WIP test, so I wouldn't advise trying it as its still under development.

The shifter is only running double speed as I needed a good clock source, which the OSC's do not give, they are supposed to output 4.5V but lucky to get 2V out of them, so they just wont work, a quick fix was to buffer via the shifter, which does work, but needs further working to correct this issue.

As for timings, the only thing running double speed is the MMU and CPU (with the shifter but that wasn't intentional). Once the shifter is running correct speed the image should be pretty much back to normal.

I plan to speed test the MMU over the next few days to see what speed it goes up to before the ST refuses to boot. Also, if timings are a problem, I will develop a clock switcher to only switch when the CPU is talking to RAM, if the MMU can push faster then can further boost the speed and the CPU together. All other timings will not be affected. Idea being run the MMU and CPU at 16mhz or more, and also run the CPU 16mhz or more on internal instructions. Its time consuming but perfectly possible as already proven.

[mc6809e]

ahh, yep, nice link, wish I had come across that yesterday!

See what I did on my shifter, was leave the thing running at 32mhz input, so the pixel rate wouldn't change, the H & V sync are now at double speed, so my monitor *should* display the image, Though its not working at the moment,

I hope you're not using an old CRT. You can permanently damage the flyback transformer by forcing a horizontal scan rate that exceeds what it was designed for. Use a modern display that has built in protection against scan rates outside its rated limits.

If you're using a VGA monitor, you might need to do something with the polarity of the HSync and VSync pulses to get it to work.

[exxos]

I hope you're not using an old CRT. You can permanently damage the flyback transformer by forcing a horizontal scan rate that exceeds what it was designed for. Use a modern display that has built in protection against scan rates outside its rated limits.
If you're using a VGA monitor, you might need to do something with the polarity of the HSync and VSync pulses to get it to work.

H sync is normal ST speed, I have not boosted any video timings other than the one mentioned, which was just a quick fix for a clock problem I had. I do not plan on VGA support, but may be possible with some work.

[exxos]

It seems getting a "good" 32mhz clock is easier said than done. I now recall my test from 10 years ago as I had to run a 74LS buffer on 7volts to get a good 4.5V logic 1 output, I remember the chip getting a bit hot too, and this is the same problem I have now. The osc chips after 16mhz just output to low, can be anywhere from 2 to 3 volts, which isn't enough to get a 4.5V to 5V true logic 1. The MMU does a great job at this, but I can't really run this at double speed so I need a better 32mhz drive.

I am still thinking about this, maybe goto a cmos device and run on 7volts, this may give a better logic 1 output of 4.5V, though the output current may not be enough... Considering the shifter is old tech, it seems to have better operation than the stuff today!