Modified ST hassles

[ralcool]

Not sure what your saying Simbo.

The memory is working perfectly. It might be nice to combine it all into a single 4mb 72pim simm- and I have a few- but it is unneccessary.
Both banks are running fine now- just some old soldering on the 20yr old shiftr mounted ram was a little troublsome. All fixed.
The simms were added becuase I have over a dozen of them- and the wiring is relatively simple. 4Mb is nice @ 80ns.

The Hd modual is perfect again. The latest replcement FDD was slightly incompatible. Circuits traced and modified. Just need to load the HD driver under any TOS version to activate High Density in the format menu. But the supplied formatter seems better anyway. IBM compatible. I've even removed the 'bypass' circuit. Neater too.

The overscan harness is a little messy-long connection points. But its nearly perfect to fit a Lascan device- only one wire to alter- and two to remove even. Bonus is the old overscan wasn't >tos1.4 compatible. Plus removing is harness is difficult due to cut tracks. Lascan is simple to make.

I've been talking about TOS patching since I do want/need to fit a new hdd. My MegaFile is very worn out from years of use- and RLL harddrives are impossible to get. Fitting an IDE drive is conceptually simple- The TOS patching was straight forward, new 1.4 ROMs have been created and tested perfectly so far. I've also patched some 'Super' 2.06 images too for inclusion with the final mod. And have been testing the results with Seltos/Steem.

Rather than fit the space hungry CPU mounted TOS kit- I'll knock out a board with a new GAL and IDE logic. My GALs are on their way.

Finally the C16 is functioning well- I can't wait for some hdd space to reinstall Windows 3.0/3.1 and see VGA mode for once. I've always had a colour monitor/CGA. Be interesting to see if pperos IDE driver is compatible in PC emulation mode. Only failing memory wiring was causing it to act up.

Remember all these upgrades have been in service for many years. Only the simms are newish. The cpu mounted TOS2.06 could have been buggy for any numbr of reasons- but using it lately with SelTOS has been perfect. I expect the same from alternatively fitted roms- and will trial soon. Plus the questionable IMP DMA chip has been replaced with a real Atari one from my spares.

So expect a homebrew IDE conversion soon- with thanks to pperos excellent documentation, I just have to work out a board- since no Eagle PCB file links seem to work anymore- plus they won't fit my setup as the cpu socket is taken. I plan to piggyback the blitter. Just need to find narrow spaced idc header pins that will fit the socket rows- and get some new etching chemicals.

I'll post up a picture soon of the cleanedup motherboard. Big difference. Tidier resoldered wiring, removed old double sided tape. New rom window stickers.

[ralcool]

Here is the latest picture of the cleaned up motherboard.



So far all working perfectly. Waiting for parts for new upgrades. (Lascan, IDE, Flashable TOS & maybe 68881, plus new IIT 2C87 to replace 287XL)

In the background you can see my modified ATX psu 'lab' power supply. Currently 'feeding' the ST.

[ralcool]

Also, I plan to use 'J9' pads for my IDE/Flash power cable (in front of the PSU connector). The reburnt roms are good- just now need to test 'ide' mode when completed.

The two added connectors on the rear of the ST, are mono sound output direct from the monitor socket, and external Hd floppy sense. (The external FDD2 cable has a 'external' plug to 'unground' the external sense pin of the HD modual to pin 2 of the cable/fdd2 If connected- clever hey?!)

Pic of 'external' drive and doubled 5 1/4"compatible edge style connector...... for legacy use.


Back in business.

[wongck]

wow... you're good

[ralcool]

Now that this DIY IDE site is down- did anyone mirror the contents? Ppero?

http://www.infofront.de/andreas/index.htm

[ralcool]

What I really can't work out.

I've been pouring over the ST diagrams working the connections of the A16/17/CE jumpers. Easy enough. Just need to remember/learn A0 (rom) =A1 (cpu)- why does Atari think zero isn't a number?!
Jumper A17 swaps OE 'ground' with an address (real A16). A16 swaps VPP (5v) for (real) A15. CE lets ROM2 bypass the 74LS11 for the 6chip TOS.

Ok. OE. ala output enable. Now Pperos digrams for TOS upgrading, shows this going to Ground. As does Ataris' schematics- unless using rare 128kx8 28pin roms (2chip TOS) where OE is replaced by an address line. A17 (A16)

Fine.

Now My T_Board64, the TOS 2.06 upgrade. AND another TOS 2.06 upgrade guide from the Atari Hardware Hack page- wire their OE line from the roms to UDS/LDS. LDS goes to the 'odd' rom, UDS to the 'even'.

I 've read that the 'odd' roms goto the 'lower' Data lines D0-D7, and the 'Even' to the 'upper' D8-D15. Easy to see how its wired, and CE is used to activate the roms (via Rom0,1,2- paired Hi/Lo) when required..so....

I am forced to ASSUME that the UDS/LDS lines don't HAVE to be connected to their respective OE pins....

STE rom sockets ground their OE lines- unless used by the ancient 28pin 1MB Roms (via W102) for A16 (A17). I call the W102 jumper- the Legacy rom jumper- roms with an address pin in the OE location.
And the 2.06 roms drop straight in to STEs, so it can't be mandatory.

However;
I CANNOT work out how one could use a SINGLE rom given they have only half the dataline required. I guess a clever logic switch... how does Mario do it....?!

[Nyh]

I've been pouring over the ST diagrams working the connections of the A16/17/CE jumpers. Easy enough. Just need to remember/learn A0 (rom) =A1 (cpu)- why does Atari think zero isn't a number?!

Simple. The 68000 has A1 to A23.

Counting starts with A1 because as a 16 bit processor the 68000 addresses 16 bits at a time. To address a singe byte the 68000 uses UDS and LDS. Those two take over the function of A0.

Hans Wessels

[ralcool]

MIGHT have found an answer to the different uses of OE.

http://www.armory.com/~rstevew/Public/P ... s_Work.htm + reading ROM Datasheets.

When using roms, CE is generally used to 'wake up' the chip and supply data. A delay occurs since basically the whole chip is 'sleeping' ala, a low power mode until accessed.

Using OE is faster, since only the data lines are inactive until OE is polled. Thus the chip delivers data faster (wakes up quicker) at the expense of higher general power consumption.

Since this mode appears to be used in some cases (T_Board64) I guess the ST can work out if the higher speed access option is available and uses it.

TOS then should be quicker in use when addressing operating system calls. SO, wire up you UDS/LDS CPU lines to your roms' OE pins (unsocket the pin from ground first)- the ST should be slightly faster. In theory.

LDS (CPU pin 8') to Even/Hi (OE pin 24), LDS (CPU pin 7) to Odd/Lo (OE Pin 24). (And this is how the T_Board64 is wired) For a STFM DIL64pin cpu. (STE PLCC 68 pin cpus actually use the same pin # here)

Wow, this stuff takes some digging to find.

[1024MAK]

I don't think your idea of changing the connections on the OE pins will make much difference as both OE and CE are active low signals. If the OE pin is connected to 0V (ground) then as far as the EPROM is concerned the signal is always active.
And anyway the control signals of the Atari are connected to the CE pin so this determines the access time.

[ralcool]

Found some answers.

UDS/LDS for TOS roms (OE) as mentioned by 1024Mak- would be largely not required- but seemingly because rom calls appear to always be 16bit in nature using just CE via ROM0/1/2- and both hi/lo chips feed in unison. So using those lines COULD have been for very early TOS calls of an 8bit size - if any. The early 520STs were wired like this... so maybe this WAS neccesary. Probably obselete- so now unused. (Not withstanding my T_Board (TOS2.06) having this provision included) UDS/LDS can do 8bit reads from the cartridge port..... or perhaps a psuedo A0 if your projects calls for it......

Mario Crofts IDE interface used a 16bit rom- hard to read the writing.. but its a 27c2048. 128kx16k 2Mb. no need to split the rom image. ala 2 x 8bit roms hi/lo.
Also the Falcon has a 16bit rom.

The little known rom 'jumpers' on the STE are 'Configuration Switch Registers' E0-E7. Are wired through a 74ls244 to the upper databus via d8-15. Polled by a signal (xbutton) from the combo GLU chip. Setting the jumper pulls low each bit.

E7-1 Dma Sound hardware available. (0= Not avail)
E6-1 Only low speed (8mhz) WD1772 availble. (0 = 16mhz) (reading the MegaSTE upgrade kit- An Ajax chip was included, and a different PAL chip- I guess 8/16mhz select. (Plus TOS 2.06))
E5-1 Bypass self test. (0=Don't bypass)
E1-4 Undefined.

The Mega STs clock chip is also on the 68000 bus. only lines A1-A4, D0-D3. RP5C15. Looks simple enough. Apart from the power and xtal wiring.

Pperas IDE design appears to use the same addressing range as the STBook. No wonder its slightly possible to use AHDI software.. if obselete.

Interesting stuff...

[ralcool]

Minor brainwave last night.. If clever ppera can create an IDE IF on the cartridge port... using only A1-A15..and the full D0-D15 lines... then and adapter could be made internally on the 1040ST on the rom sockets. The lines run right up to the cpu...this (aparently discontinued project) is not possible due to lack of the special drivers and schematics... then

I could easily add another 10/11 easy wires to complete A18-A23, AS & RW and Dtack/Reset/FDint to the tos rom mounted board. Mostly soldered to cpu pins or ctt board vias.

ROM2,VCC and CE, D0-D7 & A1-A17 are available on Lo-0, Next chip Hi2 with remaining D8-15. In the centre of the 6 rom cluster. Remove all- may run two chip (or one 16bit) switchable tos 1.x and 2.06.

I have no room on my cpu, and a piggyback plug for the blitter socket impossible to find- using the rom sockets is easy enough tho. Plenty of room.

[ralcool]

Several hours on the ExpressPCB, I've come up with a ROM mounted TOS/IDE board. As mentioned, sits on Lo0/Hi2 sockets- just need to relocate 4700uf cap slightly.

Just Add 16/19 more wires (!) to the MB, and it should work. (No worse than installing a PS2 modchip!)



Setup for single sided pcb... a few top side links required, but its the best I can manage for now...

I might add the flashable rom feature yet.. but I've finished checking all the connections so far- and it appears electrically correct. I'll have to inteprete pperos' description again to figure it out.

I don't think I need to actually wire CE/Rom2 since the roms contact the original points.

[ralcool]

Well, Managed to unlock and partition an old xbox 10gb hdd...not exactly easy, but successful. (actually two) using (www.)HDAT2(.com) utility.

Have 31Mb (FAT16/16k cluster) + 998mb, and remainder several 2gb partitions setup, with a smaller 760~mb for final remaining space. FAT16/32k Clusters. HDtune shows 28Mb/sec speed from old xbox drive. More than ST can use.?!

If it works out, I'll get a 5-20Gb 2.5" hdd for the ST. Inside case stealth mount... prolly under the 3.5" floppy...just enough room there for 9.5mm drive.

Just buying some sockets for soon to make PCB.... and alter GAL files for 20V8 program with only 2 chip TOS 2.06. No HC245 buffers.
If only could figure out T_Board software TOS switch contained in their GAL....

[ralcool]

The new 64pin sockets arrived the other day (thanks ebay-machined 64pin goodness)... So I got to test the T_Board64 again. Now using the Atari DMA chip (Not the f'in IMP branded crap)- the disc/file corruption problem is solved....yay, after so many years of previous frustration...! (and no available spares)

'IMP' DMA/MMU/GLU chips are (must be) generally BAD! In my experience. Overscan faults, memory faults, TOS 2.06 faults. Get rid of them! Finally EVERYTHING is working! The DMA was the last IMP branded chip in the system, and now GONE! (thank God for recent aquisitions of usable Atari parts)...

The ebay 'used' 29F010 roms arrived, and were unable to be reflashed- seems they are write protected! (Seemingly containing code from a gambling machine) My programmer can't deal with this. So some replacement NEW 29F010-70ns chips are on their way.

SuperTOS patched twisted IDE code 2b loaded/flashed very soon. Initial tests will be on the T_Board, and hopefully soon running the ROM mounted IDE interface (now down to 11 extra wires hopefully A17-23,AS,RW,Dtack,Reset,ACSIpin10)

I might continue to run the T_Board for the neat software switch prg/acc for the newer TOS. and continue to default cold boot to the (IDE patched) TOS 1.4 for games...maybe. Even though my keyboard won't fit with the T_Board mounted.....decisions decisions... more tests to decide if permanant 2.06 is my thing.

But still need a GAL programmer....minimum $40/60 on ebay for a TOP853 or G540 programmer... I'll buy one, just for the whole fun experiment. And learning about PAL/GAL chips is interesting.....

Watch this space. Nearly a personal blog these days......

[Shredder11]

Watch this space. Nearly a personal blog these days......

I'm certainly watching with great interest

[wongck]

sounds like something great here... but a bit too technical for me.
(not a hardware guy myself)

[ralcool]

Years ago I found what you MIGHT call an easter egg in TOS 1.4... I attemped to find it again...

At address FD0270.. when viewed as ASCII, is "Dave StaUgas loves Bea Hablig" using my debug cartridge viewing TOS. !!

Or when viewed in HxD on a once piece TOS 1.4 [GB] rom image, its at offset 102A1 and AGAIN at 13206

I'm sure there was another one.... .... found it. "M LOVES JENEANE" AT offset 11252

Love immortalised in silicon.

Edit, WOW Its still there in TOS 2.06 UK @ C034/CFF0/F0A6... cool stuff.

[ralcool]

Circuit board etching delay due to printer ink not liking clear 'overhead projector paper' I use for making negative mask for PCBs.... need fresh OEM ink anyway...


Having trouble with the TOS patching actually.

I had done the patching, and tested IDE patched TOS 1.4 under Steem. Everything seemed ok- no crashing. I inserted the reburnt patched 6chip TOS 1.4 into the ST tonight, and was getting 4bombs randomly or locking up.

OK. Started the debug cartridge on original 1.4 TOS code, and noted that at address postion $FC0462 (the patch location for pperos jmp $fefd00) contained data

...
FC0462 610000CC BSR $FC0530
FC0466 610000E4 BSR $FC054C
FC046A 61000992 BSR $FC0DFE...

In the Hex editor location 00462-465 has written 0610000CC, and next location 466-469 has 610000E4.

Also the source code for the 1.4 patch mentions

" * Execute 2 overwritten calls:
jsr $FC0530
jsr $FC054C "

OK. Replacing the missing branches with a pair of jumps back... so both locations 462-469 are used...

So HxD shows from 462-469 [61 00 00 CC 61 00 00 E4] then

When overwriting (paste/write) the 462 location with ($)4E F9 00 FE FD 00 as per the patch instructions, location 468/9 is incompletely overwritten with remaining data (bold) 4E F9 00 FE FD 00 00 E4 untouched.

Should I paste 4EF90000 in 462-465, and FE FD 00 00 in 465-469. This would seem to fill the field without leftover bytes.

Just seems the instructions aren't as obvious to me as they probably are. Where am I going wrong.

(Also confusing is why the TOS 1.06/2.06 patch has the same apparent problem) Interestingly their jump location (jmp $E32000 or $E3FA00 )goes to the patch code where inserted in the free space at $32000 or $3FA00 at the bottom of the code space (The E is the position in the ST address space vs HxD)- yet TOS 1.4s says jmp to $FEFD00 but paste the bin patch into $2FD00) Its no doubt correct, but I can't see why.

[ralcool]

I will attempt to display the results of patching TOS 1.4 (UK) in the location specified using my debug cartridge.

This glitch appears when using SELTOS to load the modified image or when burn to actual roms. Normal boot- but unstable. Random lockups or 4 Bombs. (If the cartridge is fitted it will usually catch the crash and display BusError and a strange location 040FFDC.

Here is an image taken of the patched jmp as it appears in the code- you can see the '00 E4' left over bytes commented as 'unassigned' in location $468 as a result of the jmp patch being smaller than the bytes overwritten. There ARE other locations even in the unmodified code saying unassigned, the bytes displayed are usually '00FC' as early as $FC0004 in the first instance.

The patch appears fine- with exeception of the '00 E4' bytes leftover. jmp $fefd00. (image loaded into cartridge software- not running)

Are the remaining bytes causing the TOS to glitch? My next attempt will be to rename them to 00FC.


And also a image of TOS 1.4 unmodified for the same $462/466 location. (Loaded from live TOS hence extra $FCxxx) See matching green circle.


Here is the location of the T14DUB2.BIN in HxD after being inserted at 2FD00 in the TOS image.


Do I have a problem? The patched SelTOS loaded SuperTOS 2.06 doesn't appear to crash. (Although also has new 'unassigned' values of in location $1678 of 037C)

I also don't know yet if IDE twisted auto boot mode actually works until the adapter is finished. In either TOS.

[ralcool]

Just a random last resort test-frustrated/boredom........ SelTos loaded TOS1.4 IDE appears stable if my RAM is switched to 1Mb mode. (A9 disabled)

Maybe my memory chips have a new error. Time to load memtest-german again.

This is wierd. Nothing crashed like this until now. Even the T_Board is working perfectly under 4Mb. (And never worked properly until the DMA chip was finally changed)

I'm going to bed. Stupid computers.

[DarkLord]

Isn't Ppera the one who wrote and maintains SelTOS?

If thats right, I'd go to his forums and pop off a message
to him, he might be able to help.

[ralcool]

I can't seem to find a forum for him. His web site only has his usual mods and pages. Although he does have a email support link.

I've been running memtest repeatedly on 4Mb and only get an 1 random read/write error per 5-6 test reruns. (at nearly 10mins per run).

This is pretty good, but not entirely perfect. But everything else (software) seems to run fine. I'd expect an occasional error on a unshielded machine.

[ralcool]

I found online the very same SuperMon cartridge I use on my ST! I tried a cart dump with the Steem utility, and appears identical running in Steem as my STs.

I can't seem to attach the *.stc version.

[wongck]

I can't seem to find a forum for him. His web site only has his usual mods and pages. Although he does have a email support link.

ppera forum is http://ppera.07x.net/forum/index.php

[ralcool]

Thanks Mr Wongck..... I'll check it out.