64MB SDRAM?kolla wrote:It did for me, random reboots happens way too often.
Minimig (Amiga) core discussion
Moderators: Mug UK, Zorro 2, spiny, Greenious, Sorgelig, Moderator Team
Re: Minimig (Amiga) core discussion
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- Atari maniac
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Re: Minimig (Amiga) core discussion
Hi, I'm wondering if anyone would be interested in playing with tg68k implementation. I've been toying with adding RTD instruction, since that's pretty much just RTS with immediate displacement for SP. My last attempt seemed to allow me to boot BestWB, but I wanted to get some more skilled people to look over my baby steps, and maybe find some way to add validation or unit tests.
Thanks,
Adam
Thanks,
Adam
Re: Minimig (Amiga) core discussion
I need an advice too
SDRAM controller slot 2 currently is only for FAST memory accesses (banks other than zero), am I right?
Could I remove that slot completely, if the only FAST memory I would use is in DDR?
Looks like that didn't hurt much, except it reduces FAST memory by little amount...

SDRAM controller slot 2 currently is only for FAST memory accesses (banks other than zero), am I right?
Could I remove that slot completely, if the only FAST memory I would use is in DDR?
Looks like that didn't hurt much, except it reduces FAST memory by little amount...
Re: Minimig (Amiga) core discussion
Well, you can if you know how, but for what purpose?sonycman wrote:I need an advice too
SDRAM controller slot 2 currently is only for FAST memory accesses (banks other than zero), am I right?
Could I remove that slot completely, if the only FAST memory I would use is in DDR?
Looks like that didn't hurt much, except it reduces FAST memory by little amount...
Theoretically, can leave SDRAM only for ChipRAM. Then it will be possible to unload SDRAM access and use only single slot.
May be it can increase stability with not so good 64MB modules.
Ok. i will try such version.
Re: Minimig (Amiga) core discussion
One thing i never tested is which memory works faster as FastRAM: DDR or SDR.
Is there any memory performance test for Amiga?
Is there any memory performance test for Amiga?
- witchmaster
- Captain Atari
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Re: Minimig (Amiga) core discussion
Maybe this one could work? Haven't tested it myself though.Sorgelig wrote:One thing i never tested is which memory works faster as FastRAM: DDR or SDR.
Is there any memory performance test for Amiga?
http://aminet.net/package/util/moni/SSSpeed056
Re: Minimig (Amiga) core discussion
Is there compatibility issue if system will have FastRAM only as Zorro III?
Re: Minimig (Amiga) core discussion
Should be OK. We only have to disable the 8M and 16M Autoconf Memory boards in tg68k.
Re: Minimig (Amiga) core discussion
i'm not talking about Minimig specifics.R4MS wrote:Should be OK. We only have to disable the 8M and 16M Autoconf Memory boards in tg68k.
Just talk about Amiga in general. Zorro III 256MB chunk will be above 24bit address space. I'm not sure if there any apps not able to use >24bit space.
Re: Minimig (Amiga) core discussion
Funny, with FastRAM in DDR3 only, Sysinfo shows even higher rate
Not much higher, just about 5%.

Re: Minimig (Amiga) core discussion
Can we redirect Zorro II memory to DDR as well?Sorgelig wrote:Zorro III 256MB chunk will be above 24bit address space. I'm not sure if there any apps not able to use >24bit space.R4MS wrote:Should be OK. We only have to disable the 8M and 16M Autoconf Memory boards in tg68k.
Sounds great!Sorgelig wrote:Funny, with FastRAM in DDR3 only, Sysinfo shows even higher rateNot much higher, just about 5%.
Is DDR fast memory cached, just like its SDR part?
Re: Minimig (Amiga) core discussion
all fastram will be in ddrsonycman wrote:Can we redirect Zorro II memory to DDR as well?
yes.sonycman wrote:Is DDR fast memory cached, just like its SDR part?
Re: Minimig (Amiga) core discussion
There have been early apps that used the upper byte of the address registers to store stuff. Those will obviously not work on a system with a 32bit address bus. If tg68k implements this correctly, 68000 and 68010 should only use 24 bits for addresses and therefore be unable to see Zorro III FastRAM.Sorgelig wrote: I'm not sure if there any apps not able to use >24bit space.
Re: Minimig (Amiga) core discussion
i will leave it to youR4MS wrote:There have been early apps that used the upper byte of the address registers to store stuff. Those will obviously not work on a system with a 32bit address bus. If tg68k implements this correctly, 68000 and 68010 should only use 24 bits for addresses and therefore be unable to see Zorro III FastRAM.

There will be new FastRAM options set: 2/4/8/256/384
First three are Zorro II.
Re: Minimig (Amiga) core discussion
Toni Wilen has a developed a testsuit for 68k cpus: http://eab.abime.net/showthread.php?t=98747apolkosnik wrote: tg68k .... add validation or unit tests.
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- Obsessive compulsive Atari behavior
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Re: Minimig (Amiga) core discussion
Was the option to adjust the size of the screen removed from recent versions of Minimig?, i dont see it in the Audio & video options anymore?
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- Atari maniac
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Re: Minimig (Amiga) core discussion
Awesome, thank you!
R4MS wrote:Toni Wilen has a developed a testsuit for 68k cpus: http://eab.abime.net/showthread.php?t=98747apolkosnik wrote: tg68k .... add validation or unit tests.
Re: Minimig (Amiga) core discussion
I just used it today on the current release.BlockABoots wrote:Was the option to adjust the size of the screen removed from recent versions of Minimig?, i dont see it in the Audio & video options anymore?
Re: Minimig (Amiga) core discussion
Having the same issue. Just built the thing and downloaded the latest core and while Workbench would boot, running almost any program gurus...with what might be memory related meditation numbers. Also noticed screen glitches on the one game I tested. Going back to 20190717 did make it all better. The last two updates are the problem.Sinclair wrote:I am sorry to say now that although it boot without problems the system has become unstable with continuous Worbench errors and strange behaviors in some games.Sinclair wrote:Works fine!Sorgelig wrote:Test version:
Minimig.zip
Some fixes and tweaks for 64MB modules.
It's absolutely required to update MiSTer binary and Menu core which will detect the module size!
Thank you.
I had to go back to versión 20190717

This with 32 meg SDRAM
Re: Minimig (Amiga) core discussion
You probably know, that bestwb boots if you delete libs/68020.library? I deleted also 68030, 68040 and 68060 libraries just in case.apolkosnik wrote:Hi, I'm wondering if anyone would be interested in playing with tg68k implementation. I've been toying with adding RTD instruction, since that's pretty much just RTS with immediate displacement for SP. My last attempt seemed to allow me to boot BestWB, but I wanted to get some more skilled people to look over my baby steps, and maybe find some way to add validation or unit tests.
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- Atari maniac
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Re: Minimig (Amiga) core discussion
Absolutely. I got the cputester going, it's really useful at this stage.
GoingDown wrote:You probably know, that bestwb boots if you delete libs/68020.library? I deleted also 68030, 68040 and 68060 libraries just in case.apolkosnik wrote:Hi, I'm wondering if anyone would be interested in playing with tg68k implementation. I've been toying with adding RTD instruction, since that's pretty much just RTS with immediate displacement for SP. My last attempt seemed to allow me to boot BestWB, but I wanted to get some more skilled people to look over my baby steps, and maybe find some way to add validation or unit tests.
Re: Minimig (Amiga) core discussion
No, just same old 32MB.Sorgelig wrote:64MB SDRAM?kolla wrote:It did for me, random reboots happens way too often.
I noticed new release today, with only chipram on SDRAM, looking forward to testing that tomorrow (my MiSTer is in my office at work currently).
Many thanks

-- kolla
Re: Minimig (Amiga) core discussion
Excellent news! I can test - I have some test binaries from Oliver Roberts of WarpDT and IBrowse team, turned out the IBrowse 2.5 license keys could not be decrypted properly with the tg68 020 implementation, so he made a few test binaries to figure out where it fails. If you like I can send you those, or test your tg68 core with registered IBrowse 2.5. Another culprit is kingcon.device 40+ from Cosmos...apolkosnik wrote:Hi, I'm wondering if anyone would be interested in playing with tg68k implementation. I've been toying with adding RTD instruction, since that's pretty much just RTS with immediate displacement for SP. My last attempt seemed to allow me to boot BestWB, but I wanted to get some more skilled people to look over my baby steps, and maybe find some way to add validation or unit tests.
-- kolla
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- Atari maniac
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Re: Minimig (Amiga) core discussion
Awesome, cputester that R4MS mentioned works pretty well for my testing so far, at this stage it's pretty much behaving like RTS, with illegal instruction trap added if it runs on 68000. I'm trying to figure out how to add the displacement to the stack pointer. I'm looking at how LINK is implemented, since it also has the part that adds immediate value to SP. I'll report back once it passes cputester tests.kolla wrote: Excellent news! I can test - I have some test binaries from Oliver Roberts of WarpDT and IBrowse team, turned out the IBrowse 2.5 license keys could not be decrypted properly with the tg68 020 implementation, so he made a few test binaries to figure out where it fails. If you like I can send you those, or test your tg68 core with registered IBrowse 2.5. Another culprit is kingcon.device 40+ from Cosmos...
Re: Minimig (Amiga) core discussion
Gentlemen, let's discuss what is missing to transfer the m68k processor emulation to the HPS side. (Hybrid emulation)
I will write my thoughts on this topic.
1. FastRAM is fully sided with HPS. Since nobody has access to it except the CPU.
2. For the lower 16mega bytes of memory in which Kiskstart (ROM), Chipmem, IO region are located, it is necessary to make a bridge between FPGA and HPS.
3. CPU control signals: Interrupt control, Processor status, Reset, HALT, Bus control and others. Here you need to tear apart separately from each case separately. But it will be necessary to determine in the m68k emulation code where they can be obtained.
For starters, we can build https://github.com/aranym/aranym
as a simple Linux application. Fortunately, there is now a framebuffer. And then try tranfer the functionality on the FPGA.
I will write my thoughts on this topic.
1. FastRAM is fully sided with HPS. Since nobody has access to it except the CPU.
2. For the lower 16mega bytes of memory in which Kiskstart (ROM), Chipmem, IO region are located, it is necessary to make a bridge between FPGA and HPS.
3. CPU control signals: Interrupt control, Processor status, Reset, HALT, Bus control and others. Here you need to tear apart separately from each case separately. But it will be necessary to determine in the m68k emulation code where they can be obtained.
For starters, we can build https://github.com/aranym/aranym
as a simple Linux application. Fortunately, there is now a framebuffer. And then try tranfer the functionality on the FPGA.