SDRAM board

JimDrew · Post by **JimDrew** » Sun Dec 02, 2018 6:59 am

One other thing to mention. When I have a SDRAM board that gets 1 or 2 failures per minute using the latest memory test (the one where you can change the memory speed) I find that I can go back and use the old 167MHz test and I don't get any errors at all. This is repeatable. So, keep that in mind. I am not sure why this is, or which memtest program is actually right.

jft · Post by **jft** » Mon Dec 03, 2018 4:46 pm

JimDrew wrote:... I find that I can go back and use the old 167MHz test and I don't get any errors at all.

Funny you say this. I am finding my boards are very stable without errors at 150Mhz if I use the old 150Mhz core (just wish it had a timer so I know how long it's been).

JimDrew · Post by **JimDrew** » Mon Dec 03, 2018 6:49 pm

I believe the fasted requirement for any core is under 120MHz, so it probably doesn't matter if the memory passes at anything higher than that.

Sorgelig · Post by **Sorgelig** » Mon Dec 03, 2018 11:25 pm

There is a list of SDRAM frequencies used in cores:
https://github.com/MiSTer-devel/Main_Mi ... t-by-cores

jft · Post by **jft** » Tue Dec 04, 2018 7:20 pm

Thanks guys. Understood on the requirements of the cores and I appreciate the insight.
My goal was to determine why I could not acheive what is seen as a "reasonable expectation" of at least 150mhz on my assembled boards. The difference between the new memtest core (boards only stable at 140mhz in auto mode) and the old 150mhz only core (boards are stable at this frequency) surprised me, and I am amazed at the wide variance between DE-10 boards (pointed out by JimDrew). I can get no board stable above 150mhz at all - both Winbond and Alliance chips.
I guess it just leads to a bit of a frustrating experience for us trying to build a few boards, as results are difficult to trust. I am going to go by the 150mhz test when I list my boards in the other thread.

darcoza · Post by **darcoza** » Wed Dec 05, 2018 5:56 pm

Hi I have been looking through the git-hub repository looking for a schematic for the SDRAM board but I can't find one. I'm curious if someone has a copy? I'd like to make a few adjustments to the board design to fit the assembly set up I have in my shop more easily and the process would go more quickly if I could start with the schematic instead of having to try and follow traces from screenshots etc.
Thanks!

jft · Post by **jft** » Wed Dec 05, 2018 7:27 pm

There is a schematic in the Hardware-Mister repository under the releases folder.

darcoza · Post by **darcoza** » Fri Dec 07, 2018 5:10 pm

Awesome! Thank you so much! That's a huge help!

JimDrew · Post by **JimDrew** » Tue Dec 11, 2018 10:24 pm

jft wrote:
JimDrew wrote:... I find that I can go back and use the old 167MHz test and I don't get any errors at all.
Funny you say this. I am finding my boards are very stable without errors at 150Mhz if I use the old 150Mhz core (just wish it had a timer so I know how long it's been).

So... I got another new DE-10 in today. This DE-10 is really weird with the SDRAM tests. Under the latest memtest, no SDRAM board will test fine at 167MHz in this new DE-10. Either of my other DE-10's will test the same SDRAM board perfectly at 167MHz. Now... that odd thing is that if I test a SDRAM board and it has periodic failures with the newer memtest, I have always been able to test it with the older "memtest-167Mhz" core and it passes perfectly. With this new DE-10, instead of it passing it fails with a rapidly increasing failed number! This DE-10 seems particularly picky about the test used. I see no failures at 160Mhz (newer memtest) or 150Mhz (original memtest), it's just at the 167MHz speed.

lolof · Post by **lolof** » Wed Dec 12, 2018 2:26 pm

Are you using this Windbond ICs ?
It seems not worth to spare on 2-3€ and use those....
I built some sdram boards with Alliance AS4C16M16SA-6TIN from Mouser. TIN is for the industrial variant, it's guaranteed to work @85°C. Though, It probably does not matter for the MiSTer.
Memtes prog can be a bit picky I think, if you have a problem, decrease the speed to minimum let say for 5 minutes and then go back to 167Mhz, this worked for me.
I was afraid reading this thread before to build my sdram board but finally, all boards I've done with this ram were running fine @167mhz for >1,5 hours (with last Memtest available from the homepage).
All caps 100nf X7R, hand job soldering with drag method and a very good flux (no hotair, it's not needed for this job and could arm the ram if not well done) all board cleaned in ultrasonic bath with isopropanol.

JimDrew · Post by **JimDrew** » Wed Dec 12, 2018 4:09 pm

I have the exact same results with both Alliance and Winbond chips using the XS PCB.

zerohimself · Post by **zerohimself** » Thu Dec 13, 2018 6:15 am

Ok, so do the mister cores run these chips at 167? because i've now build several boards that get 3-4 errors at 167 withing 20 mins... If this is overkill, what freq do the cores run the memory at? I'm a little panicked that i just got 100 of these winbond chips, and within the first 10, i've got 4 that are failing @167

THaase · Post by **THaase** » Thu Dec 13, 2018 9:24 am

Relax - highest core frequency is 114.75 Core Support.
Everything starting from 140MHz is fine!

Sorgelig · Post by **Sorgelig** » Thu Dec 13, 2018 11:48 am

Actually highest is 128MHz.
140MHz is enough.

JimDrew · Post by **JimDrew** » Thu Dec 13, 2018 4:49 pm

Don't panic, you don't need to pass 167MHz with the XS SDRAM board. In fact, you may find that all of the XS SDRAM boards you build (no matter was brand SDRAM you use) always fail at 167MHz on some DE-10's. I have 3 different DE-10 boards. One of them passes 167MHz even when the board if full of solder flux and parts are skewed. My most recent DE-10 won't pass 150MHz sometimes, even for the boards that are commercially produced and perfect.

Sorgelig · Post by **Sorgelig** » Thu Dec 13, 2018 5:07 pm

That's true. Some DE10-nano boards may work on higher frequency with SDRAM while other may fail.
That's why i won't use frequencies higher than 140MHz in the cores.

widge · Post by **widge** » Thu Dec 13, 2018 6:13 pm

Sorgelig wrote:Actually highest is 128MHz.
140MHz is enough.

Which core needs 128Mhz?

Sorgelig · Post by **Sorgelig** » Thu Dec 13, 2018 7:02 pm

Archie

uigiflip · Post by **uigiflip** » Thu Dec 20, 2018 6:04 pm

When furtekks neogeo core and neogeo sdram is released could say other cores like fxcast, minimig a0486 utilise the extra sdram? looking like its going to be 96MB or 128MB SDRAM.

or would that need a complete rewrite of these cores?

Sorgelig · Post by **Sorgelig** » Thu Dec 20, 2018 7:00 pm

It's too early to talk about NeoGeo requirements. AFAIK author is in evaluation stage of requirements.
ao486 doesn't use SDRAM module. It uses DDR3.
Atari should be happy with 32MB as it was plenty on that time. 8MB on that time was like an unlimited amount

As for chips, SDRAM in this chip format was 64MB max. Using 2 chips is probably impossible due to I/O line load and signal propagation time. The fact that even current SDRAM module works is just lucky coincidence and my perseverance. It was hard time for me to make it work on GPIO connector originally not supposed to drive such fast device. I've made several prototypes in order to make it work reliably on >64MHz clocks. And so far i found only one SDRAM chip working on acceptable speed - Alliace AS4C. Much later i've discovered another chip Winbond with similar characteristics. All other chips are failing in these conditions.
64MB chips have worse characteristics in terms of power consumption and thus have lower max clock according to my tests. I could make it work only at ~130MHz which is ok, but very close to clock used in some cores now.

Minimig is the only core using full page burst mode (X68000 too but this core is almost useless), so in order to work with 64MB chip it has to be modified as 32MB uses different row/col addressing. All other cores doesn't care of addressing mode and can work with both 32MB and 64MB chips.

viperman3 · Post by **viperman3** » Thu Dec 20, 2018 7:23 pm

When sourcing 0805 ceremic capacitors for the SDRAM XS board, what is the voltage limit not to go below? I see that the current BOM calls for .1uF @ 50V
I suspect the 50V is on the very conservative side. Can I use capacitors rated at 25V (still conservative?) in lieu of the 50V (current supply shortage of Low ESL type capacitor).

Thanks for any feedback

Sorgelig · Post by **Sorgelig** » Thu Dec 20, 2018 8:22 pm

Such capacitors usually must be rated at double VCC voltage. So, 6.3V capacitors are enough.

chrisrr · Post by **chrisrr** » Sun Dec 23, 2018 2:46 am

Has anyone had any luck with the Micron MT48LC16M16A2P-6A?
https://uk.farnell.com/micron/mt48lc16m ... dp/2253737

I just tried it myself as it was what I could buy in the UK, and I can't get more than 90MHz out of it.

The datasheet claims to work up to 166MHz, and it appears functionally identical to the recommended Alliance IC. The only difference is a 6ns access time vs 5ns, both of which should still work at 166MHz and definitely well within range of the 100MHz that's failing

Sorgelig · Post by **Sorgelig** » Sun Dec 23, 2018 3:00 am

chrisrr wrote:Has anyone had any luck with the Micron MT48LC16M16A2P-6A?
https://uk.farnell.com/micron/mt48lc16m ... dp/2253737

I just tried it myself as it was what I could buy in the UK, and I can't get more than 90MHz out of it.

The datasheet claims to work up to 166MHz, and it appears functionally identical to the recommended Alliance IC. The only difference is a 6ns access time vs 5ns, both of which should still work at 166MHz and definitely well within range of the 100MHz that's failing

If you would read the Wiki and Hardware repository, you will find out that:

Usually other similar projects use older chip MT48LC16M16A2, but it doesn't work well on this project. Maximum clock achieved on MT48LC16M16A2 is 60MHz which is not acceptable for most projects.

chrisrr · Post by **chrisrr** » Sun Dec 23, 2018 3:19 am

If you would read the Wiki and Hardware repository, you will find out that:
Usually other similar projects use older chip MT48LC16M16A2, but it doesn't work well on this project. Maximum clock achieved on MT48LC16M16A2 is 60MHz which is not acceptable for most projects.

Ah that's a shame. Ive read the wiki pages on the main_mister GitHub repo but I didn't see that there was more info on the hardware_mister repo.
Thanks for your help, I'll have to see if I can find somewhere to source the alliance ICs

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