First thank you for your interest in these little piece of doc Yacht was (and still is ?).
I confirm the typo for the MULU #<data> line.
I made a wrong copy/paste for the <ea> exec time (got the line from the .L section and not from the .W section).
The line should read :
#<data> | 38+2m(1/0) 4(1/0) | np | np n*
As I initially stated in the topic where I originally posted this file (http://www.atari-forum.com/viewtopic.php?f=68&t=24710#p227267
), I'm sure it's far from perfect. Primary because this table was a re-work of many documents (some in propriary format, some still partially handwritten) and was only re-read by its writer (me) and secondly because English is not my first language and the texts I wrote could be unclear.
The primary goal of these documents was to provide to a 68000 programmer a practical view of the timing of instructions, to explain a further more the numbers you could find in the 68000UM, by tracing when and in which order data are read or write (LSB/LSW first or MSB/MSW first) and when prefetches occure. The order of read and write was important when programming a 68000 to work with co-processors. The occurrence of prefetch was important when using some self modfying code (and other nasty tricks of these days of paleo-computering).
On the original documents, there was also a section on /DTACK (grounded or not) that never maked its way to the yacht doc.
At the time the original documents were written, we had a very few tools to understand how this processor worked and, yes, the patent and the official manuals were our primary source of knowledge. As far as I can say, more of the guess we have done from these documents were tested on real hardware (except from the exceptions, I think).
As for the exception (and as I stated in the original post), they always kept a smell of magic to the team that wrote the original documents.
As you stated, the document is self-contradictory about some exceptions between instruction section and exception section. It's probably all my fault misreading source documentation, but our work was, by far, more imprecise on this part than on the "standard instructions".
Nowaday with the excellent work of ijor on his FPGA core, i don't know if this yacht file is still of any interest, but if it is, as I stated in the initial post feel free to correct it and improve it. For me It's more than past history, now.
Enough of good old days for this time. Cheers !