SHIFTER reimplementation on FPGA

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Re: SHIFTER reimplementation on FPGA

Postby ijor » Tue Aug 14, 2018 7:34 pm

Smonson wrote:So to make a stand-alone shifter with the Altera parts I can access in this old version of Quartus, I guess it would basically need all the same hardware as the HDMI board: 16 pins of bidirectional level shifters, 9 pins of downward level shifters and 10 upward level shifter for the clock and RGB (as well as the 32MHz oscillator).


Btw, out of curiosity, what are you using for the bidirectional level shifters? Digital transparent switches or buffered transceivers?

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Re: SHIFTER reimplementation on FPGA

Postby Smonson » Tue Aug 14, 2018 10:30 pm

I'm using a transceiver (74ALVC164245) for the data bus. The 5-to-3.3 shifters are 74LVC245s and the 16MHz clock is buffered at the socket with an MC74VHC1GT125.

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Re: SHIFTER reimplementation on FPGA

Postby ijor » Wed Aug 15, 2018 1:26 am

Smonson wrote: ... the 16MHz clock is buffered at the socket with an MC74VHC1GT125.


I wonder if this is really needed. Did you happen to test without it? I'm not suggesting to not use a level shifter and it certainly improves the noise margin, but just curious because TTL compatible output levels probably work.

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Re: SHIFTER reimplementation on FPGA

Postby Smonson » Wed Aug 15, 2018 2:47 am

I didn't test without it, but I had a huge amount of noise on my original prototype (that used stripboard) to the point where it rarely functioned. With the 3.3v clock passing through an unshielded ribbon cable, it seems worth having it. It's only a 40c part, and it's tiny (3x2.5mm), so not too many downsides. For something as important as the primary clock, especially.

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Re: SHIFTER reimplementation on FPGA

Postby TotOOntHeMooN » Sat Mar 16, 2019 9:52 am

Really interresting topic and great work! :)

I have seen your result on the HDMI display.
Assuming it is scan doubled, Is the signal can be set to 15kHz too?

About the screen mode, it should be really intessesting to have something like:
- 320x200 8bit plan
- 320x200 4bit plans dual playfield

Do you think that could be achieved to allow to produce more colourful games?
By the way, have fun! ^^

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Re: SHIFTER reimplementation on FPGA

Postby Smonson » Sat Mar 16, 2019 10:01 am

Thanks! Not sure what you mean by the 15KHz signal question. The signal coming in will be the ST's native line frequency (15 or 31KHz) and the output line frequency will always be 31KHz. The picture displayed is either 400 or 480 lines depending on whether borders are shown.

320x200x8 and similar modes are theoretically possible, but it would require an ST running st 16MHz. I don't personally have such a machine, so I can't help much on that front.

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Re: SHIFTER reimplementation on FPGA

Postby TotOOntHeMooN » Sat Mar 16, 2019 10:14 am

Thank you for your fast answer.

I spoke about the output line frequency to be able to continue to use the original monitors or TV set with 200 lines resolutions.
Yes, it will require a 16MHz ST... I have found your topic because I was looking to redo a main board for my ST and though about using 2x shifter first. Now, I understand that is not your goal. May be an alternate usage when your will reach it?!

Keep go on! :D

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Re: SHIFTER reimplementation on FPGA

Postby Smonson » Sat Mar 16, 2019 10:33 am

You can't actually generate a HDMI picture with 200 lines within the specification... The minimum pixel rate is something like 25MHz, so to generate an image with a small resolution you're supposed to use line-doubling. I'm always using 32MHz for the pixel rate, same as ST mono.

For a test, I did implement a 256-colour mode on this board, but since it's only running at 8MHz the resolution is just 160x200, which is not very good to look at.

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Re: SHIFTER reimplementation on FPGA

Postby TotOOntHeMooN » Sat Mar 16, 2019 10:47 am

Sorry, probably my english is bad... I ask if the display can be done on a standard CRT monitor/TV set with 200 lines using your FPGA.
Thank you for doing the test. I understand that result will be 160x200 for a 8MHz CPU (it remember the Amstrad CPC mode 0).

If you are OK, I will be proud to use your final work on my own mainboard instead of having to steel a shifter from a second ST.
It will be really great to have more colourful games to do some VGA ports. Take your time and have fun!

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Re: SHIFTER reimplementation on FPGA

Postby Smonson » Sat Mar 16, 2019 11:03 am

If we're talking about my HDMI mod board - sorry, there's no way to output analogue video from it at this time, because it doesn't have any circuitry to generate the analogue RGB signals.

But there's nothing preventing the Verilog code that I've published on github from being used to generate analogue video, if someone created a board for such a purpose. I assume that you had in mind a board that replaces the original ST shifter and performs the same job - although possibly with extra video modes.

I think it's a good idea and definitely within the realm of possibility. I see that spare shifters are out of stock on Exxos' store, perhaps they're getting difficult to come by.

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Re: SHIFTER reimplementation on FPGA

Postby TotOOntHeMooN » Sat Mar 16, 2019 11:16 am

Yes, it should be a really good idea to offer a PCB to replace the standard part. (best with more features)

I don't know if it is compatible, but an alternative should be to use a resistors network or a 3x Nbit DAC to input the digital pixels data and output the analog signal. Last but not least, it can embed a 256 colours palette to reduce the FPGA design, if required.

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Re: SHIFTER reimplementation on FPGA

Postby Smonson » Mon Mar 18, 2019 10:39 pm

EDIT: double post, sorry
Last edited by Smonson on Mon Mar 18, 2019 10:42 pm, edited 1 time in total.

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Re: SHIFTER reimplementation on FPGA

Postby Smonson » Mon Mar 18, 2019 10:40 pm

TotOOntHeMooN wrote:an alternative should be to use a resistors network or a 3x Nbit DAC to input the digital pixels data and output the analog signal.


No need - the ST main board has these already.

TotOOntHeMooN wrote:embed a 256 colours palette to reduce the FPGA design


This would greatly increase the FPGA resources needed.

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Re: SHIFTER reimplementation on FPGA

Postby TotOOntHeMooN » Mon Mar 18, 2019 11:21 pm

I spoke about an external DAC IC that embed the colour palette to save FPGA resource (used on PC VGA and A1200).
Not to embed the palettes into the FPGA. ;) (sure, it is not good for a Shifter replacement part)

By the way, do you know this FPGA : https://www.seeedstudio.com/Sipeed-TANG ... -2881.html
It looks really interresting by its price and capabilities into a small package.

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Re: SHIFTER reimplementation on FPGA

Postby Smonson » Mon Mar 18, 2019 11:28 pm

But the ST doesn't use a hard-coded palette, so it needs to be a dual-port RAM device. That means two buses going to the FPGA, which is quite a lot of pins at 9-12 bits each. It's something to keep in mind, I guess.

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Re: SHIFTER reimplementation on FPGA

Postby TotOOntHeMooN » Tue Mar 19, 2019 8:46 am

Sure, I understand. Better to be set into the FPGA DPRAM in this case.
Thank you for your answers.

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Re: SHIFTER reimplementation on FPGA

Postby Smonson » Tue Mar 19, 2019 9:46 am

I'm learning more about small FPGAs at the moment. If I'm in a position to do some experiments in this area I'll let you know how I get along. Right now for me, a lack of time is a big problem.

Maybe this is a project for you?

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Re: SHIFTER reimplementation on FPGA

Postby TotOOntHeMooN » Tue Mar 19, 2019 10:22 am

Thank you to share your progress and let me know. :)

No sure if it is currently a project for me... I have to think about this Shifter replacement, but to do first my mainboard replacement because I don't want to hack too much my computer. And in this way, I will expect to understand it better.


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