Minimig (Amiga) core discussion

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fpgaarcade
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Re: Minimig (Amiga) core discussion

Postby fpgaarcade » Thu Feb 14, 2019 1:44 pm

R4MS wrote:From what I understand, he wants to run the CPU emulation on an ARM core (which goes on a daughter-board of the FPGA-Arcade) and use FPGA only for the custom chips. This will not be a core in the strict FPGA sense, but will most probably faster than anything you could do on an affordable FPGA. Maybe this could be ported our MISTer, since we already have a spare ARM core :D


Not quite.
Currently we have the FX (cycle accurate core) and the M68K soft core 020 which runs at 28MHz with I/D cache (it's a tidy up of the T68K, nothing major). I have a daughterboard with a real 060. This replaces the soft CPU when used.

For R2 we have these options as well as a new softcore in design which should be approximately equal to the Vampire - except fully open.

You are correct with the hybrid emulation - except it is running on the ARM core in the FPGA. You could do the same think yes on the DE10 I think.

There is a lot of Xilinx specific code in my design, especially in the cache system. Part of the work towards R2 is replacing this with platform specific code, which opens up the possibility of a DE10 port.


Lots of this kinda stuff which needs to be migrated.

attribute RLOC of fd_dq_t2_ena : label is "X1Y0";
attribute U_SET of fd_dq_t2_ena : label is "dram_mux";
-- falling edge reclock
fd_dq_t1_ena_1 : FD_1 port map (Q => dq_ena_t1_1 , C => i_clk, D => dq_ena); -- falling edge clock
fd_dq_t1_ena : FD port map (Q => dq_ena_t1, C => i_clk, D => dq_ena);
fd_dq_t2_ena_1 : FD_1 port map (Q => dq_ena_t2_1 , C => i_clk, D => dq_ena_t1_1);
fd_dq_t2_ena : FD port map (Q => dq_ena_t2, C => i_clk, D => dq_ena_t1);

-- static
fd_sel0 : FD port map (Q => dq_sel(0), C => i_clk, D => i_cal_sel(0));
fd_sel1 : FD port map (Q => dq_sel(1), C => i_clk, D => i_cal_sel(1));

-- mux
lut4_dq_mux1 : LUT4
generic map ( INIT => x"F0CA" )
port map ( I0 => dq_ena_t1_1, I1 => dq_ena_t1, I2 => dq_sel(0), I3 => '0', O => dq_mux_01 );

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Re: Minimig (Amiga) core discussion

Postby Sorgelig » Thu Feb 14, 2019 2:08 pm

@fpgaarcade:
My comment didn't include your name. How come you thought it's about you? ;)

You are not right about that I'm just collecting other's designs. I've developed several cores and greatly improved other cores as well. Some cores before the port was in unusable stage and required a lot of work.
I appreciate your work on arcades, but please don't diminish the others work. You don't know how many thousands of hours I've spent on MiSTer to bring it to the point where it is. And of course open source helping a lot. And MiSTer is open source as well. It still have issues, but i'm not afraid to keep it public even if it's not perfect.

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Re: Minimig (Amiga) core discussion

Postby Sorgelig » Thu Feb 14, 2019 2:12 pm

fpgaarcade wrote:It's impossible for me or any other hardware vendor to compete with the DE10 board on price, they get an massive educational discount from Intel. I can't get the Xilinx near equivalent device in qty 1000 for less than the entire DE10, which is ridiculous.

It's pure your decision. You could choose not to compete but support DE10.

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Re: Minimig (Amiga) core discussion

Postby Sorgelig » Thu Feb 14, 2019 2:44 pm

fpgaarcade wrote:I'm building a new library of all the building blocks for the github release that I will attempt to maintain. When I import somebody else's design, I ask politely and then make sure they are updated. It's a gift, not a right - time and effort is their most valuable resource.

It's good that you intend to maintain your code. But there is one thing you cannot control - once you open the source, you cannot control how and who will fork it. You may agree with some one to make a linked repository (which is big evil IMHO) but others will fork anyway. And you won't even know how many local clones many different people will make.
It doesn't mean no one will know the origin. Every HDL file may have a header with the link to repository - so everyone will know it. But you need to forget your idea to control the others how they use the open source code in their open source projects.

fpgaarcade
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Re: Minimig (Amiga) core discussion

Postby fpgaarcade » Thu Feb 14, 2019 2:47 pm

Sorgelig wrote:
fpgaarcade wrote:I'm building a new library of all the building blocks for the github release that I will attempt to maintain. When I import somebody else's design, I ask politely and then make sure they are updated. It's a gift, not a right - time and effort is their most valuable resource.

It's good that you intend to maintain your code. But there is one thing you cannot control - once you open the source, you cannot control how and who will fork it. You may agree with some one to make a linked repository (which is big evil IMHO) but others will fork anyway. And you won't even know how many local clones many different people will make.
It doesn't mean no one will know the origin. Every HDL file may have a header with the link to repository - so everyone will know it. But you need to forget your idea to control the others how they use the open source code in their open source projects.


Depends on the license. Open source does not Require this. It's not about control, more about support and stability.

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Re: Minimig (Amiga) core discussion

Postby Sorgelig » Thu Feb 14, 2019 3:20 pm

fpgaarcade wrote:It's not about control, more about support and stability.

The core built with specific version of modules should keep all modules. Remote modules updated independently - the great source of instability regardless they are supposed to fix any known bugs.

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Re: Minimig (Amiga) core discussion

Postby slingshot » Thu Feb 14, 2019 4:20 pm

Just a little comment: I would happily use submodules for CPUs and such basic building blocks. Local hacks for these modules are the real evil. Copying a CPU to 10 cores, then make some changes in one, another change in the other...at the end copy the assumed to be the best to every core, losing all history, and finally impossible to track down changes and regressions.
A submodule in git is a link to a specific commit, so it won't affect stability if the upstream progresses. It's your decision to remain at a specific state or go ahead. It should also help in maintaining quality, e.g. to not add one alien pin or hack to a module just because it's easier to implement something with that in core X.

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Re: Minimig (Amiga) core discussion

Postby fpgaarcade » Thu Feb 14, 2019 4:30 pm

Agreed.
Submodules work well, but personally I get easily confused...I'll have a chat to the people-who-understand-git on my team!

What I've done it have the build system link between repos.
I suggest people pull my common repos and use the files directly.

repos V
replay_common/lib/cpu/m68k/files.txt

repos V
replay_amiga/replay1_aga/files.txt

pulls in from the shared area. Other people pull the repos and then include the files directly in their project with relative paths if desired.

/Mike

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Re: Minimig (Amiga) core discussion

Postby Sorgelig » Thu Feb 14, 2019 4:44 pm

And after some years linked repository may disappear or moved.
Sometimes you do a local clone just to keep the sources for may be future work. Then later you come back and find it uses submodules and these submodules are no longer there. So, source is broken then.
If you keep the main core and submodules in your own repository there is a less chance to loose it. Linking to other account is risky.

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Re: Minimig (Amiga) core discussion

Postby slingshot » Thu Feb 14, 2019 5:19 pm

Sorgelig wrote:And after some years linked repository may disappear or moved.
Sometimes you do a local clone just to keep the sources for may be future work. Then later you come back and find it uses submodules and these submodules are no longer there. So, source is broken then.
If you keep the main core and submodules in your own repository there is a less chance to loose it. Linking to other account is risky.


That's a real concern, everybody can press delete on his github repo. If you have the core locally, you'll have the submodule, too. Also you can clone it to mitigate such events.
Last edited by slingshot on Thu Feb 14, 2019 5:23 pm, edited 1 time in total.

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Re: Minimig (Amiga) core discussion

Postby slingshot » Thu Feb 14, 2019 5:23 pm

fpgaarcade wrote:Agreed.
Submodules work well, but personally I get easily confused...I'll have a chat to the people-who-understand-git on my team!

What I've done it have the build system link between repos.
I suggest people pull my common repos and use the files directly.

repos V
replay_common/lib/cpu/m68k/files.txt

repos V
replay_amiga/replay1_aga/files.txt

pulls in from the shared area. Other people pull the repos and then include the files directly in their project with relative paths if desired.

/Mike


Well, this doesn't prevent anyone to use submodules in his own repo. E.g. I can add a replay_common to my repo, and pull yours into it. It'll be a local copy, just handled by git (if I understood you).
Btw, is m68k available to the public? I would try it on the minimig core.

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Re: Minimig (Amiga) core discussion

Postby Sorgelig » Thu Feb 14, 2019 7:00 pm

slingshot wrote:That's a real concern, everybody can press delete on his github repo. If you have the core locally, you'll have the submodule, too. Also you can clone it to mitigate such events.

key word here is "if". If it's your repository. If it's not your repository but owner is around. if, if..
This is linux way when you need to compile a small utility and discover its source needs some other sources and the original link is broken, then you start to search in internet finding some versions not really the same, etc, etc.. And at the end you will find you've spent the whole day for nothing.
This is why i'm not Linux user :) I use VM with linux strictly for compiling some specific source. No way to be a desktop OS for me :)

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Re: Minimig (Amiga) core discussion

Postby fpgaarcade » Thu Feb 14, 2019 7:03 pm

slingshot wrote:
fpgaarcade wrote:
Well, this doesn't prevent anyone to use submodules in his own repo. E.g. I can add a replay_common to my repo, and pull yours into it. It'll be a local copy, just handled by git (if I understood you).
Btw, is m68k available to the public? I would try it on the minimig core.


Yes I think so.
It's about to be. If you mail me I can send you a copy while I fix the last bits of the repro.
mikej@fpgaarcade.com

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Re: Minimig (Amiga) core discussion

Postby slingshot » Thu Feb 14, 2019 8:33 pm

Sorgelig wrote:key word here is "if". If it's your repository. If it's not your repository but owner is around. if, if..
This is linux way when you need to compile a small utility and discover its source needs some other sources and the original link is broken, then you start to search in internet finding some versions not really the same, etc, etc.. And at the end you will find you've spent the whole day for nothing.
This is why i'm not Linux user :) I use VM with linux strictly for compiling some specific source. No way to be a desktop OS for me :)


If you think this way, you have to clone the whole internet :) I've just noticed, the Sega VDP wiki disappeared. Who knows how long spritesmind.net will intact. We don't need them already, but who knows...

@fpgaarcade I've sent a mail.

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Re: Minimig (Amiga) core discussion

Postby fpgaarcade » Thu Feb 14, 2019 8:58 pm

I've sent you the code.
/Mike

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Re: Minimig (Amiga) core discussion

Postby ijor » Fri Feb 15, 2019 1:57 am

Come on, we are all here just for the fun and not for profit (I don't count small donations or hardware selling nearly at cost as commercial). Everybody has its own methods and its own timing and all should be respected.
Fx Cast: Atari St cycle accurate fpga core

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Re: Minimig (Amiga) core discussion

Postby kolla » Sat Feb 16, 2019 2:10 am

So, is this "new core" Jim mentioned made by MikeJ or not??

And did anyone try the Fx68k core with Minimig yet? Not sure if there is Amiga software that would benefit from a cycle exact 68000 core... :)
-- kolla

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Re: Minimig (Amiga) core discussion

Postby Grosbill » Sat Feb 16, 2019 5:53 am

kolla wrote:So, is this "new core" Jim mentioned made by MikeJ or not??

And did anyone try the Fx68k core with Minimig yet? Not sure if there is Amiga software that would benefit from a cycle exact 68000 core... :)

Amiga ECS/OCS demos made specifically with the stock 500 (with 1mb) in mind would greatly benefit from a cycle accurate core.

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Re: Minimig (Amiga) core discussion

Postby mahen » Sat Feb 16, 2019 9:09 am

Wow, just a dumb user here, grabbing my popcorn basket... Exciting, thanks to everyone !!

Just a note : there's a well known game that crashes with TG68k : Pinball Illusions.

Also, the incoming game Reshoot-R is supposed to make an optimal use of Amiga hardware tricks, might be another nice test case ;)

Back to lurking mode !!
Last edited by mahen on Sat Feb 16, 2019 10:17 am, edited 1 time in total.
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Re: Minimig (Amiga) core discussion

Postby fpgaarcade » Sat Feb 16, 2019 10:11 am

mahen wrote:Wow, just a dumb user here, grabbing my popcorn basket... Exciting, thanks to everyone !!

Just a note : there's a well known game that crashes with TG68k : Pinball Illusions.

Also, there incoming game Reshoot-R is supposed to make an optimal use of Amiga hardware tricks, might be another nice test case ;)

Back to lurking mode !!


I believe Pinball works fine. Feedback from slingshot is the M68K works fine in 020 mode but not 000 mode. I'll try to reproduce it.
No, this isn't the new superspeed core yet. This will be available first on R2 (as it uses the DDR4 bridge in the ultrascale) but I'm sure it can be ported. I

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Re: Minimig (Amiga) core discussion

Postby JimDrew » Sat Feb 16, 2019 10:19 am

kolla wrote:So, is this "new core" Jim mentioned made by MikeJ or not??


No, it is not. It is being created by a group of guys who can't stand Gunnar's attitude.
I am the flux ninja

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Re: Minimig (Amiga) core discussion

Postby fpgaarcade » Sat Feb 16, 2019 10:28 am

JimDrew wrote:
kolla wrote:So, is this "new core" Jim mentioned made by MikeJ or not??


No, it is not. It is being created by a group of guys who can't stand Gunnar's attitude.


This core is my attempt at cleaning up the TG68K and fixing the last few bugs. I called it M68K to differentiate it.
It's under the same license as it's a derivative.
The only thing not done is trap cc - but that's 5 mins work. I got distracted by checking and fixing stack frames.
There is one corner case flag issue which causes it do fail the 020 div test, but cas2/cmp2 etc all seems fine.

I put the FX68K core into my Amiga design and it works well, although there are some glitches we don't see with the M68K.
I think it's showing up some very subtle chipset issues, but when I get time I'll run with a real 68000 (I have one on a DB) and compare the two.
/Mike

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Re: Minimig (Amiga) core discussion

Postby slingshot » Sat Feb 16, 2019 10:40 am

fpgaarcade wrote:I believe Pinball works fine. Feedback from slingshot is the M68K works fine in 020 mode but not 000 mode. I'll try to reproduce it.
No, this isn't the new superspeed core yet. This will be available first on R2 (as it uses the DDR4 bridge in the ultrascale) but I'm sure it can be ported. I


Yepp, Pinball Illusions is fine on Miniming with M68K. Did you find anything with the 68000 mode?

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Re: Minimig (Amiga) core discussion

Postby ijor » Sat Feb 16, 2019 12:21 pm

fpgaarcade wrote:I put the FX68K core into my Amiga design and it works well, although there are some glitches we don't see with the M68K.
I think it's showing up some very subtle chipset issues, but when I get time I'll run with a real 68000 (I have one on a DB) and compare the two.
/Mike


Hi Mike.

No idea if it is related, but a bug that affected BCD instructions was recently fixed. Please update to the new version: https://github.com/ijor/fx68k
Fx Cast: Atari St cycle accurate fpga core

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Re: Minimig (Amiga) core discussion

Postby fpgaarcade » Sat Feb 16, 2019 2:23 pm

ijor wrote:
fpgaarcade wrote:I put the FX68K core into my Amiga design and it works well, although there are some glitches we don't see with the M68K.
I think it's showing up some very subtle chipset issues, but when I get time I'll run with a real 68000 (I have one on a DB) and compare the two.
/Mike


Hi Mike.

No idea if it is related, but a bug that affected BCD instructions was recently fixed. Please update to the new version: https://github.com/ijor/fx68k


ah cool, will do ! Thanks.


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