Moderators: Mug UK, Steem Authors, Moderator Team
Code: Select all
Name : Dn An (A) (A)+ -(A) $(A) I(A) .W .L $(P) I(P) #
ADDRESS error early (A0)
add.w *,d0 - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -1/4 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2208 2208 2200 2208 2200 2200 2208 2200 2208
D050 D058 D060 D068 D070 D078 D079 D07A D07B
add.w d0,* *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -1/4 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2200 2208 2200 2208
D150 D158 D160 D168 D170 D178 D179
adda.w *,a1 - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -1/4 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2208 2200 2200 2208 2200 2208 2208 2200 2208
D2D0 D2D8 D2E0 D2E8 D2F0 D2F8 D2F9 D2FA D2FB
add.w #1,* - *60 *60 *64 *64 *68 *64 *68
1/4 1/4 -1/6 3/4 7/4 1/6 1/8
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2208 2208 2200 2208 2200
0650 0658 0660 0668 0670 0678 0679
addq.w #1,* - - *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -1/4 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2208 2200 2208 2200 2200
5250 5258 5260 5268 5270 5278 5279
addx.w *,* - *60
-1/4
RI5
2200
D348
and.w *,d0 - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -1/4 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2208 2200 2208 2200 2200 2208 2200 2208 2208
C050 C058 C060 C068 C070 C078 C079 C07A C07B
and.w d0,* *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -1/4 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2200 2208 2200 2208 2208
C150 C158 C160 C168 C170 C178 C179
and.w #1,* - *60 *60 *64 *64 *68 *64 *68
1/4 1/4 -1/6 3/4 7/4 1/6 1/8
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2200 2208 2200 2208 2208
0250 0258 0260 0268 0270 0278 0279
clr.w * - *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -1/4 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2200 2208 2200 2208 2208
4250 4258 4260 4268 4270 4278 4279
cmp.w *,d0 - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -1/4 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2200 2200 2208 2200 2208 2208 2200 2208 2200
B050 B058 B060 B068 B070 B078 B079 B07A B07B
cmpa.w *,a1 - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -1/4 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2208 2208 2200 2208 2200 2200 2208 2200 2208
B2D0 B2D8 B2E0 B2E8 B2F0 B2F8 B2F9 B2FA B2FB
cmp.w #1,* - *60 *60 *64 *64 *68 *64 *68
1/4 1/4 -1/6 3/4 7/4 1/6 1/8
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2200 2208 2200 2208 2208
0C50 0C58 0C60 0C68 0C70 0C78 0C79
cmpm.w (a0)+,(a1)+ *56
1/4
RI5
2200
B348
eor.w d0,* - *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -1/4 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2200 2208 2200 2208 2208 2200
B150 B158 B160 B168 B170 B178 B179
eor.w #1,* - *60 *60 *64 *64 *68 *64 *68
1/4 1/4 -1/6 3/4 7/4 1/6 1/8
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2200 2208 2200 2208 2208 2200
0A50 0A58 0A60 0A68 0A70 0A78 0A79
move.w *,d0 - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -1/4 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2200 2208 2200 2208 2208 2200 2208 2200 2200
3010 3018 3020 3028 3030 3038 3039 303A 303B
move.w *,a1 - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -1/4 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2208 2200 2208 2200 2200 2208 2200 2208 2208
3250 3258 3260 3268 3270 3278 3279 327A 327B
move.w *,(a1) - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -1/4 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2200 2208 2200 2208 2208 2200 2208 2200 2200
3290 3298 32A0 32A8 32B0 32B8 32B9 32BA 32BB
move.w *,(a1)+ - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -1/4 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2208 2200 2208 2200 2200 2208 2200 2208 2208
32D0 32D8 32E0 32E8 32F0 32F8 32F9 32FA 32FB
move.w *,-(a1) - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -1/4 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2200 2208 2200 2208 2208 2200 2208 2200 2208
3310 3318 3320 3328 3330 3338 3339 333A 333B
move.w *,2(a1) - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -1/4 3/2 7/2 1/4 1/6 9/2 D/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2200 2208 2200 2200 2208 2200 2208 2208 2200
3350 3358 3360 3368 3370 3378 3379 337A 337B
move.w *,2(a1,d0) - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -1/4 3/2 7/2 1/4 1/6 9/2 D/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2208 2200 2208 2208 2200 2208 2200 2200 2208
3390 3398 33A0 33A8 33B0 33B8 33B9 33BA 33BB
move.w *,W - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -1/4 3/2 7/2 1/4 1/6 9/2 D/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2200 2208 2200 2200 2208 2200 2208 2208 2200
31D0 31D8 31E0 31E8 31F0 31F8 31F9 31FA 31FB
move.w *,L - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -1/4 3/2 7/2 1/4 1/6 B/2 F/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2208 2200 2208 2208 2200 2208 2200 2200 2208
33D0 33D8 33E0 33E8 33F0 33F8 33F9 33FA 33FB
movem.w *,d0-d3 *60 *60 *64 *68 *64 *68 *64 *68
1/6 1/6 3/8 7/4 1/8 1/A 9/8 D/4
RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2208 2208 2200 2208 2200 2200 2208 2200
4C90 4C98 4CA8 4CB0 4CB8 4CB9 4CBA 4CBB
movem.w d0-d3,* *60 *60 *64 *68 *64 *68
1/6 -1/6 3/8 7/8 1/8 1/A
WI5 WI5 WI5 WI5 WI5 WI5
2208 2208 2200 2208 2200 2200
4890 48A0 48A8 48B0 48B8 48B9
movep.w d0,4(a1) -
movep.w 4(a0),d0 -
neg.w * - *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -1/4 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2208 2200 2200 2208 2200
4450 4458 4460 4468 4470 4478 4479
negx.w * - *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -1/4 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2208 2200 2200 2208 2200
4050 4058 4060 4068 4070 4078 4079
not.w * - *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -1/4 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2208 2200 2200 2208 2200
4650 4658 4660 4668 4670 4678 4679
or.w *,d0 - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -1/4 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2208 2200 2208 2200 2200 2208 2200 2208 2208
8050 8058 8060 8068 8070 8078 8079 807A 807B
or.w d0,* *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -1/4 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2200 2208 2200 2208 2208
8150 8158 8160 8168 8170 8178 8179
or.w #1,* - *60 *60 *64 *64 *68 *64 *68
1/4 1/4 -1/6 3/4 7/4 1/6 1/8
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2200 2208 2200 2208 2208
0050 0058 0060 0068 0070 0078 0079
sub.w *,d0 - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -1/4 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2200 2200 2208 2200 2208 2208 2200 2208 2200
9050 9058 9060 9068 9070 9078 9079 907A 907B
sub.w d0,* *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -1/4 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2208 2208 2200 2208 2200
9150 9158 9160 9168 9170 9178 9179
suba.w *,a1 - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -1/4 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2200 2208 2208 2200 2208 2200 2200 2208 2200
92D0 92D8 92E0 92E8 92F0 92F8 92F9 92FA 92FB
sub.w #1,* - *60 *60 *64 *64 *68 *64 *68
1/4 1/4 -1/6 3/4 7/4 1/6 1/8
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2200 2208 2200 2208
0450 0458 0460 0468 0470 0478 0479
subq.w #1,* - - *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -1/4 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2200 2208 2200 2208 2208
5350 5358 5360 5368 5370 5378 5379
subx.w *,* - *60
-1/4
RI5
2208
9348
tst.w * - *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -1/4 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
4A50 4A58 4A60 4A68 4A70 4A78 4A79
add.l *,d0 - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -3/2 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2208 2200 2208 2208 2200 2208 2200 2200 2208
D090 D098 D0A0 D0A8 D0B0 D0B8 D0B9 D0BA D0BB
add.l d0,* *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -3/2 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2208 2200 2208 2200 2208 2200
D190 D198 D1A0 D1A8 D1B0 D1B8 D1B9
adda.l *,a1 - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -3/2 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2200 2208 2200 2200 2208 2200 2208 2208 2200
D3D0 D3D8 D3E0 D3E8 D3F0 D3F8 D3F9 D3FA D3FB
add.l #1,* - *64 *64 *68 *68 *72 *68 *72
1/6 1/6 -3/6 3/6 7/6 1/8 1/A
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
0690 0698 06A0 06A8 06B0 06B8 06B9
addq.l #1,* - - *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -3/2 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2208 2208 2200 2208 2200
5290 5298 52A0 52A8 52B0 52B8 52B9
addx.l *,* - *60
-1/4
RI5
2208
D388
and.l *,d0 - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -3/2 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2208 2208 2200 2208 2200 2200 2208 2200 2208
C090 C098 C0A0 C0A8 C0B0 C0B8 C0B9 C0BA C0BB
and.l d0,* *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -3/2 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2200 2208 2200 2208
C190 C198 C1A0 C1A8 C1B0 C1B8 C1B9
and.l #1,* - *64 *64 *68 *68 *72 *68 *72
1/6 1/6 -3/6 3/6 7/6 1/8 1/A
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2200 2208 2200 2208
0290 0298 02A0 02A8 02B0 02B8 02B9
clr.l * - *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -3/2 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2200 2208 2200 2208
4290 4298 42A0 42A8 42B0 42B8 42B9
cmp.l *,d0 - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -3/2 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2208 2200 2200 2208 2200 2208 2208 2200 2208
B090 B098 B0A0 B0A8 B0B0 B0B8 B0B9 B0BA B0BB
cmpa.l *,a1 - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -3/2 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2200 2208 2208 2200 2208 2200 2200 2208 2200
B3D0 B3D8 B3E0 B3E8 B3F0 B3F8 B3F9 B3FA B3FB
cmp.l #1,* - *64 *64 *68 *68 *72 *68 *72
1/6 1/6 -3/6 3/6 7/6 1/8 1/A
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2200 2208 2200 2208
0C90 0C98 0CA0 0CA8 0CB0 0CB8 0CB9
cmpm.l (a0)+,(a1)+ *56
1/4
RI5
2208
B388
eor.l d0,* - *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -3/2 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2200 2208 2200 2208 2208
B190 B198 B1A0 B1A8 B1B0 B1B8 B1B9
eor.l #1,* - *64 *64 *68 *68 *72 *68 *72
1/6 1/6 -3/6 3/6 7/6 1/8 1/A
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2200 2208 2200 2208 2208
0A90 0A98 0AA0 0AA8 0AB0 0AB8 0AB9
move.l *,d0 - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -3/2 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2200 2200 2208 2200 2208 2208 2200 2208 2200
2010 2018 2020 2028 2030 2038 2039 203A 203B
move.l *,a1 - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -3/2 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2208 2208 2200 2208 2200 2200 2208 2200 2208
2250 2258 2260 2268 2270 2278 2279 227A 227B
move.l *,(a1) - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -3/2 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2200 2200 2208 2200 2208 2208 2200 2208 2200
2290 2298 22A0 22A8 22B0 22B8 22B9 22BA 22BB
move.l *,(a1)+ - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -3/2 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2208 2208 2200 2208 2200 2200 2208 2200 2208
22D0 22D8 22E0 22E8 22F0 22F8 22F9 22FA 22FB
move.l *,-(a1) - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -3/2 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2200 2200 2208 2200 2208 2208 2200 2208 2200
2310 2318 2320 2328 2330 2338 2339 233A 233B
move.l *,2(a1) - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -3/2 3/2 7/2 1/4 1/6 9/2 D/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2208 2208 2200 2208 2200 2200 2208 2200 2208
2350 2358 2360 2368 2370 2378 2379 237A 237B
move.l *,2(a1,d0) - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -3/2 3/2 7/2 1/4 1/6 9/2 D/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2200 2208 2200 2208 2208 2200 2208 2200 2200
2390 2398 23A0 23A8 23B0 23B8 23B9 23BA 23BB
move.l *,W - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -3/2 3/2 7/2 1/4 1/6 9/2 D/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2208 2200 2208 2200 2200 2208 2200 2208 2208
21D0 21D8 21E0 21E8 21F0 21F8 21F9 21FA 21FB
move.l *,L - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -3/2 3/2 7/2 1/4 1/6 B/2 F/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2200 2208 2200 2208 2208 2200 2208 2200 2200
23D0 23D8 23E0 23E8 23F0 23F8 23F9 23FA 23FB
movem.l *,d0-d3 *60 *60 *64 *68 *64 *68 *64 *68
1/6 1/6 3/8 7/4 1/8 1/A 9/8 D/4
RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2200 2208 2208 2200 2208 2200 2200 2208
4CD0 4CD8 4CE8 4CF0 4CF8 4CF9 4CFA 4CFB
movem.l d0-d3,* *60 *60 *64 *68 *64 *68
1/6 -1/6 3/8 7/8 1/8 1/A
WI5 WI5 WI5 WI5 WI5 WI5
2200 2208 2208 2200 2208 2200
48D0 48E0 48E8 48F0 48F8 48F9
movep.l d0,4(a1) -
movep.l 4(a0),d0 -
neg.l * - *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -3/2 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2208 2200 2208 2200 2200 2208
4490 4498 44A0 44A8 44B0 44B8 44B9
negx.l * - *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -3/2 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2208 2200 2208 2200 2200 2208
4090 4098 40A0 40A8 40B0 40B8 40B9
not.l * - *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -3/2 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2208 2200 2208 2200 2200 2208
4690 4698 46A0 46A8 46B0 46B8 46B9
or.l *,d0 - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -3/2 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2208 2208 2200 2208 2200 2200 2208 2200 2208
8090 8098 80A0 80A8 80B0 80B8 80B9 80BA 80BB
or.l d0,* *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -3/2 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2200 2208 2200 2208
8190 8198 81A0 81A8 81B0 81B8 81B9
or.l #1,* - *64 *64 *68 *68 *72 *68 *72
1/6 1/6 -3/6 3/6 7/6 1/8 1/A
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2200 2208 2200 2208
0090 0098 00A0 00A8 00B0 00B8 00B9
sub.l *,d0 - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -3/2 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2208 2200 2200 2208 2200 2208 2208 2200 2208
9090 9098 90A0 90A8 90B0 90B8 90B9 90BA 90BB
sub.l d0,* *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -3/2 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
9190 9198 91A0 91A8 91B0 91B8 91B9
suba.l *,a1 - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -3/2 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2208 2200 2208 2208 2200 2208 2200 2200 2208
93D0 93D8 93E0 93E8 93F0 93F8 93F9 93FA 93FB
sub.l #1,* - *64 *64 *68 *68 *72 *68 *72
1/6 1/6 -3/6 3/6 7/6 1/8 1/A
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2208 2200 2200 2208 2200
0490 0498 04A0 04A8 04B0 04B8 04B9
subq.l #1,* - - *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -3/2 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2200 2208 2200 2208
5390 5398 53A0 53A8 53B0 53B8 53B9
subx.l *,* - *60
-1/4
RI5
2200
9388
tst.l * - *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -3/2 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2200 2208 2200 2208 2208 2200
4A90 4A98 4AA0 4AA8 4AB0 4AB8 4AB9
asl.w #1,* - *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -1/4 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2200 2208 2200 2208 2208 2200
E1D0 E1D8 E1E0 E1E8 E1F0 E1F8 E1F9
asr.w #1,* - *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -1/4 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2200 2208 2200 2208 2208 2200
E0D0 E0D8 E0E0 E0E8 E0F0 E0F8 E0F9
lsl.w #1,* - *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -1/4 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2200 2208 2200 2208 2208 2200
E3D0 E3D8 E3E0 E3E8 E3F0 E3F8 E3F9
lsr.w #1,* - *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -1/4 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2200 2208 2200 2208 2208 2200
E2D0 E2D8 E2E0 E2E8 E2F0 E2F8 E2F9
rol.w #1,* - *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -1/4 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
E7D0 E7D8 E7E0 E7E8 E7F0 E7F8 E7F9
ror.w #1,* - *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -1/4 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
E6D0 E6D8 E6E0 E6E8 E6F0 E6F8 E6F9
roxl.w #1,* - *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -1/4 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
E5D0 E5D8 E5E0 E5E8 E5F0 E5F8 E5F9
roxr.w #1,* - *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -1/4 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
E4D0 E4D8 E4E0 E4E8 E4F0 E4F8 E4F9
bchg #1,* - - - - - - - -
bchg d0,* - - - - - - - -
bset #1,* - - - - - - - -
bset d0,* - - - - - - - -
bclr #1,* - - - - - - - -
bclr d0,* - - - - - - - -
btst #1,* - - - - - - - -
btst d0,* - - - - - - - -
mulu *,d0 - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -1/4 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2200 2208 2200 2208 2208 2200 2208 2200 2200
C0D0 C0D8 C0E0 C0E8 C0F0 C0F8 C0F9 C0FA C0FB
muls *,d0 - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -1/4 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2208 2208 2200 2208 2200 2200 2208 2200 2208
C1D0 C1D8 C1E0 C1E8 C1F0 C1F8 C1F9 C1FA C1FB
abcd *,* - -
nbcd * - - - - - - - -
sbcd *,* - -
st * - - - - - - - -
tas * - - - - - - - -
move.w sr,* - *56 *56 *60 *60 *64 *60 *64
1/2 1/2 -1/4 3/2 7/2 1/4 1/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2208 2200 2208 2200 2200
40D0 40D8 40E0 40E8 40F0 40F8 40F9
move.w *,ccr - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -1/4 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2200 2208 2208 2200 2208 2200 2200 2208 2200
44D0 44D8 44E0 44E8 44F0 44F8 44F9 44FA 44FB
Code: Select all
ADDRESS error late (A1)
add.w *,d0 - - - - - - - - - - - -
add.w d0,* - - - - - - -
adda.w *,a1 - - - - - - - - - - - -
add.w #1,* - - - - - - - -
addq.w #1,* - - - - - - - - -
addx.w *,* - *64
-1/4
RI5
2200
D348
and.w *,d0 - - - - - - - - - - -
and.w d0,* - - - - - - -
and.w #1,* - - - - - - - -
clr.w * - - - - - - - -
cmp.w *,d0 - - - - - - - - - - - -
cmpa.w *,a1 - - - - - - - - - - - -
cmp.w #1,* - - - - - - - -
cmpm.w (a0)+,(a1)+ *60
1/4
RI5
2200
B348
eor.w d0,* - - - - - - - -
eor.w #1,* - - - - - - - -
move.w *,d0 - - - - - - - - - - - -
move.w *,a1 - - - - - - - - - - - -
move.w *,(a1) *56 *56 *60 *60 *64 *64 *68 *64 *68 *64 *68 *60
1/4 1/4 1/4 1/4 1/4 1/6 1/6 1/6 1/8 1/6 1/6 1/6
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2204 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
3280 3288 3290 3298 32A0 32A8 32B0 32B8 32B9 32BA 32BB 32BC
move.w *,(a1)+ *56 *56 *60 *60 *64 *64 *68 *64 *68 *64 *68 *60
1/4 1/4 1/4 1/4 1/4 1/6 1/6 1/6 1/8 1/6 1/6 1/6
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2204 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
32C0 32C8 32D0 32D8 32E0 32E8 32F0 32F8 32F9 32FA 32FB 32FC
move.w *,-(a1) *60 *60 *64 *64 *68 *68 *72 *68 *72 *68 *72 *64
-1/4 -1/4 -1/4 -1/4 -1/4 -1/6 -1/6 -1/6 -1/8 -1/6 -1/6 -1/6
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2204 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
4E71 4E71 4E71 4E71 4E71 4E71 4E71 4E71 4E71 4E71 4E71 4E71
move.w *,2(a1) *60 *60 *64 *64 *68 *68 *72 *68 *72 *68 *72 *64
3/4 3/4 3/4 3/4 3/4 3/6 3/6 3/6 3/8 3/6 3/6 3/6
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2204 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
3340 3348 3350 3358 3360 3368 3370 3378 3379 337A 337B 337C
move.w *,2(a1,d0) *64 *64 *68 *68 *72 *72 *76 *72 *76 *72 *76 *68
7/4 7/4 7/4 7/4 7/4 7/6 7/6 7/6 7/8 7/6 7/6 7/6
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2204 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
3380 3388 3390 3398 33A0 33A8 33B0 33B8 33B9 33BA 33BB 33BC
move.w *,W *60 *60 *64 *64 *68 *68 *72 *68 *72 *68 *72 *64
1/4 1/4 1/4 1/4 1/4 1/6 1/6 1/6 1/8 1/6 1/6 1/6
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2204 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
31C0 31C8 31D0 31D8 31E0 31E8 31F0 31F8 31F9 31FA 31FB 31FC
move.w *,L *64 *64 *64 *64 *68 *68 *72 *68 *72 *68 *72 *68
1/6 1/6 1/4 1/4 1/4 1/6 1/6 1/6 1/8 1/6 1/6 1/8
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2204 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
33C0 33C8 33D0 33D8 33E0 33E8 33F0 33F8 33F9 33FA 33FB 33FC
movem.w *,d0-d3 - - - - - - - -
movem.w d0-d3,* - - - - - -
movep.w d0,4(a1) -
movep.w 4(a0),d0 -
neg.w * - - - - - - - -
negx.w * - - - - - - - -
not.w * - - - - - - - -
or.w *,d0 - - - - - - - - - - -
or.w d0,* - - - - - - -
or.w #1,* - - - - - - - -
sub.w *,d0 - - - - - - - - - - - -
sub.w d0,* - - - - - - -
suba.w *,a1 - - - - - - - - - - - -
sub.w #1,* - - - - - - - -
subq.w #1,* - - - - - - - - -
subx.w *,* - *64
-1/4
RI5
2208
9348
tst.w * - - - - - - - -
add.l *,d0 - - - - - - - - - - - -
add.l d0,* - - - - - - -
adda.l *,a1 - - - - - - - - - - - -
add.l #1,* - - - - - - - -
addq.l #1,* - - - - - - - - -
addx.l *,* - *68
-1/4
RI5
2208
D388
and.l *,d0 - - - - - - - - - - -
and.l d0,* - - - - - - -
and.l #1,* - - - - - - - -
clr.l * - - - - - - - -
cmp.l *,d0 - - - - - - - - - - - -
cmpa.l *,a1 - - - - - - - - - - - -
cmp.l #1,* - - - - - - - -
cmpm.l (a0)+,(a1)+ *64
1/4
RI5
2208
B388
eor.l d0,* - - - - - - - -
eor.l #1,* - - - - - - - -
move.l *,d0 - - - - - - - - - - - -
move.l *,a1 - - - - - - - - - - - -
move.l *,(a1) *56 *56 *64 *64 *68 *68 *72 *68 *72 *68 *72 *64
1/4 1/4 1/4 1/4 1/4 1/6 1/6 1/6 1/8 1/6 1/6 1/8
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2208 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
2280 2288 2290 2298 22A0 22A8 22B0 22B8 22B9 22BA 22BB 22BC
move.l *,(a1)+ *56 *56 *64 *64 *68 *68 *72 *68 *72 *68 *72 *64
1/4 1/4 1/4 1/4 1/4 1/6 1/6 1/6 1/8 1/6 1/6 1/8
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2208 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200 2208
22C0 22C8 22D0 22D8 22E0 22E8 22F0 22F8 22F9 22FA 22FB 22FC
move.l *,-(a1) *60 *60 *68 *68 *72 *72 *76 *72 *76 *72 *76 *68
-1/4 -1/4 -1/4 -1/4 -1/4 -1/6 -1/6 -1/6 -1/8 -1/6 -1/6 -1/8
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
2300 2308 2310 2318 2320 2328 2330 2338 2339 233A 233B 233C
move.l *,2(a1) *60 *60 *68 *68 *72 *72 *76 *72 *76 *72 *76 *68
3/4 3/4 3/4 3/4 3/4 3/6 3/6 3/6 3/8 3/6 3/6 3/8
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
2340 2348 2350 2358 2360 2368 2370 2378 2379 237A 237B 237C
move.l *,2(a1,d0) *64 *64 *72 *72 *76 *76 *80 *76 *80 *76 *80 *72
7/4 7/4 7/4 7/4 7/4 7/6 7/6 7/6 7/8 7/6 7/6 7/8
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
2380 2388 2390 2398 23A0 23A8 23B0 23B8 23B9 23BA 23BB 23BC
move.l *,W *60 *60 *68 *68 *72 *72 *76 *72 *76 *72 *76 *68
1/4 1/4 1/4 1/4 1/4 1/6 1/6 1/6 1/8 1/6 1/6 1/8
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
21C0 21C8 21D0 21D8 21E0 21E8 21F0 21F8 21F9 21FA 21FB 21FC
move.l *,L *64 *64 *68 *68 *72 *72 *76 *72 *76 *72 *76 *72
1/6 1/6 1/4 1/4 1/4 1/6 1/6 1/6 1/8 1/6 1/6 1/A
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
23C0 23C8 23D0 23D8 23E0 23E8 23F0 23F8 23F9 23FA 23FB 23FC
movem.l *,d0-d3 - - - - - - - -
movem.l d0-d3,* - - - - - -
movep.l d0,4(a1) -
movep.l 4(a0),d0 -
neg.l * - - - - - - - -
negx.l * - - - - - - - -
not.l * - - - - - - - -
or.l *,d0 - - - - - - - - - - -
or.l d0,* - - - - - - -
or.l #1,* - - - - - - - -
sub.l *,d0 - - - - - - - - - - - -
sub.l d0,* - - - - - - -
suba.l *,a1 - - - - - - - - - - - -
sub.l #1,* - - - - - - - -
subq.l #1,* - - - - - - - - -
subx.l *,* - *68
-1/4
RI5
2200
9388
tst.l * - - - - - - - -
asl.w #1,* - - - - - - - -
asr.w #1,* - - - - - - - -
lsl.w #1,* - - - - - - - -
lsr.w #1,* - - - - - - - -
rol.w #1,* - - - - - - - -
ror.w #1,* - - - - - - - -
roxl.w #1,* - - - - - - - -
roxr.w #1,* - - - - - - - -
bchg #1,* - - - - - - - -
bchg d0,* - - - - - - - -
bset #1,* - - - - - - - -
bset d0,* - - - - - - - -
bclr #1,* - - - - - - - -
bclr d0,* - - - - - - - -
btst #1,* - - - - - - - -
btst d0,* - - - - - - - -
mulu *,d0 - - - - - - - - - - -
muls *,d0 - - - - - - - - - - -
abcd *,* - -
nbcd * - - - - - - - -
sbcd *,* - -
st * - - - - - - - -
tas * - - - - - - - -
move.w sr,* - - - - - - - -
move.w *,ccr - - - - - - - - - - -
Code: Select all
BUS error early (A0)
add.w *,d0 - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2208 2200 2208 2200 2200 2208
D050 D058 D060 D068 D070 D078 D079
add.w d0,* *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2200 2208 2200 2208
D150 D158 D160 D168 D170 D178 D179
adda.w *,a1 - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2200 2208 2200 2208 2208
D2D0 D2D8 D2E0 D2E8 D2F0 D2F8 D2F9
add.w #1,* - *128 *128 *128 *132 *136 *132 *136
0/4 0/4 -2/6 2/4 6/4 0/6 0/8
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2208 2208 2200 2208 2208
0650 0658 0660 0668 0670 0678 0679
addq.w #1,* - - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2208 2200 2208 2200 2200
5250 5258 5260 5268 5270 5278 5279
addx.w *,* - *124
-2/4
RI5
2200
D348
and.w *,d0 - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2208 2200 2200 2208 2200
C050 C058 C060 C068 C070 C078 C079
and.w d0,* *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2200 2208 2200 2208 2208
C150 C158 C160 C168 C170 C178 C179
and.w #1,* - *128 *128 *128 *132 *136 *132 *136
0/4 0/4 -2/6 2/4 6/4 0/6 0/8
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2200 2208 2200 2208 2208
0250 0258 0260 0268 0270 0278 0279
clr.w * - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2200 2208 2200 2208 2208
4250 4258 4260 4268 4270 4278 4279
cmp.w *,d0 - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2200 2208 2200 2208 2208 2200
B050 B058 B060 B068 B070 B078 B079
cmpa.w *,a1 - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2208 2200 2208 2200 2200 2208
B2D0 B2D8 B2E0 B2E8 B2F0 B2F8 B2F9
cmp.w #1,* - *128 *128 *128 *132 *136 *132 *136
0/4 0/4 -2/6 2/4 6/4 0/6 0/8
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2200 2208 2200 2208 2208
0C50 0C58 0C60 0C68 0C70 0C78 0C79
cmpm.w (a0)+,(a1)+ *124
0/4
RI5
2200
B348
eor.w d0,* - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2200 2208 2200 2208 2208 2200
B150 B158 B160 B168 B170 B178 B179
eor.w #1,* - *128 *128 *128 *132 *136 *132 *136
0/4 0/4 -2/6 2/4 6/4 0/6 0/8
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2200 2208 2200 2208 2208 2200
0A50 0A58 0A60 0A68 0A70 0A78 0A79
move.w *,d0 - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
3010 3018 3020 3028 3030 3038 3039
move.w *,a1 - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2208 2200 2200 2208 2200
3250 3258 3260 3268 3270 3278 3279
move.w *,(a1) - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
3290 3298 32A0 32A8 32B0 32B8 32B9
move.w *,(a1)+ - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2208 2200 2200 2208 2200
32D0 32D8 32E0 32E8 32F0 32F8 32F9
move.w *,-(a1) - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
3310 3318 3320 3328 3330 3338 3339
move.w *,2(a1) - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2200 2208 2200 2208
3350 3358 3360 3368 3370 3378 3379
move.w *,2(a1,d0) - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2208 2208 2200 2208 2200
3390 3398 33A0 33A8 33B0 33B8 33B9
move.w *,W - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2200 2208 2200 2208
31D0 31D8 31E0 31E8 31F0 31F8 31F9
move.w *,L - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2208 2208 2200 2208 2208
33D0 33D8 33E0 33E8 33F0 33F8 33F9
movem.w *,d0-d3 *128 *128 *132 *136 *132 *136 - -
0/6 0/6 2/8 6/8 0/8 0/A
RI5 RI5 RI5 RI5 RI5 RI5
2208 2208 2200 2208 2200 2200
4C90 4C98 4CA8 4CB0 4CB8 4CB9
movem.w d0-d3,* *128 *128 *132 *136 *132 *136
0/6 -2/6 2/8 6/8 0/8 0/A
WI5 WI5 WI5 WI5 WI5 WI5
2208 2208 2200 2208 2200 2200
4890 48A0 48A8 48B0 48B8 48B9
movep.w d0,4(a1) -
movep.w 4(a0),d0 *128
4/2
RI5
2200
0108
neg.w * - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2208 2200 2200 2208 2200
4450 4458 4460 4468 4470 4478 4479
negx.w * - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2208 2200 2200 2208 2200
4050 4058 4060 4068 4070 4078 4079
not.w * - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2208 2200 2200 2208 2200
4650 4658 4660 4668 4670 4678 4679
or.w *,d0 - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2208 2200 2200 2208 2200
8050 8058 8060 8068 8070 8078 8079
or.w d0,* *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2200 2208 2200 2208 2208
8150 8158 8160 8168 8170 8178 8179
or.w #1,* - *128 *128 *128 *132 *136 *132 *136
0/4 0/4 -2/6 2/4 6/4 0/6 0/8
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2200 2208 2200 2208 2208
0050 0058 0060 0068 0070 0078 0079
sub.w *,d0 - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2200 2208 2200 2208 2208 2200
9050 9058 9060 9068 9070 9078 9079
sub.w d0,* *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2208 2208 2200 2208 2200
9150 9158 9160 9168 9170 9178 9179
suba.w *,a1 - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2208 2200 2208 2200 2200
92D0 92D8 92E0 92E8 92F0 92F8 92F9
sub.w #1,* - *128 *128 *128 *132 *136 *132 *136
0/4 0/4 -2/6 2/4 6/4 0/6 0/8
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2200 2208 2200 2208
0450 0458 0460 0468 0470 0478 0479
subq.w #1,* - - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2200 2208 2200 2208 2208
5350 5358 5360 5368 5370 5378 5379
subx.w *,* - *124
-2/4
RI5
2208
9348
tst.w * - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
4A50 4A58 4A60 4A68 4A70 4A78 4A79
add.l *,d0 - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2208 2208 2200 2208 2200
D090 D098 D0A0 D0A8 D0B0 D0B8 D0B9
add.l d0,* *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2208 2200 2208 2200 2208 2200
D190 D198 D1A0 D1A8 D1B0 D1B8 D1B9
adda.l *,a1 - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2200 2208 2200 2208
D3D0 D3D8 D3E0 D3E8 D3F0 D3F8 D3F9
add.l #1,* - *132 *132 *132 *136 *140 *136 *128
0/6 0/6 -4/6 2/6 6/6 0/8 0/A
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2200
0690 0698 06A0 06A8 06B0 06B8 06B9
addq.l #1,* - - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2208 2208 2200 2208 2200
5290 5298 52A0 52A8 52B0 52B8 52B9
addx.l *,* - *124
-2/4
RI5
2208
D388
and.l *,d0 - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2208 2200 2208 2200 2200 2208
C090 C098 C0A0 C0A8 C0B0 C0B8 C0B9
and.l d0,* *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2200 2208 2200 2208
C190 C198 C1A0 C1A8 C1B0 C1B8 C1B9
and.l #1,* - *132 *132 *132 *136 *140 *136 *132
0/6 0/6 -4/6 2/6 6/6 0/8 0/A
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2200 2208 2208 2200
0290 0298 02A0 02A8 02B0 02B8 02B9
clr.l * - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2200 2208 2200 2208
4290 4298 42A0 42A8 42B0 42B8 42B9
cmp.l *,d0 - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2200 2208 2200 2208 2208
B090 B098 B0A0 B0A8 B0B0 B0B8 B0B9
cmpa.l *,a1 - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2208 2200 2208 2200 2200
B3D0 B3D8 B3E0 B3E8 B3F0 B3F8 B3F9
cmp.l #1,* - *132 *132 *132 *136 *140 *136 *132
0/6 0/6 -4/6 2/6 6/6 0/8 0/A
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2200 2208 2208 2200
0C90 0C98 0CA0 0CA8 0CB0 0CB8 0CB9
cmpm.l (a0)+,(a1)+ *124
0/4
RI5
2208
B388
eor.l d0,* - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2200 2208 2200 2208 2208
B190 B198 B1A0 B1A8 B1B0 B1B8 B1B9
eor.l #1,* - *132 *132 *132 *136 *140 *136 *136
0/6 0/6 -4/6 2/6 6/6 0/8 0/A
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2200 2208 2200 2200 2208
0A90 0A98 0AA0 0AA8 0AB0 0AB8 0AB9
move.l *,d0 - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2200 2208 2200 2208 2208 2200
2010 2018 2020 2028 2030 2038 2039
move.l *,a1 - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2208 2200 2208 2200 2200 2208
2250 2258 2260 2268 2270 2278 2279
move.l *,(a1) - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2200 2208 2200 2208 2208 2200
2290 2298 22A0 22A8 22B0 22B8 22B9
move.l *,(a1)+ - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2208 2200 2208 2200 2200 2208
22D0 22D8 22E0 22E8 22F0 22F8 22F9
move.l *,-(a1) - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2200 2208 2200 2208 2208 2200
2310 2318 2320 2328 2330 2338 2339
move.l *,2(a1) - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2208 2200 2208 2200 2200 2208
2350 2358 2360 2368 2370 2378 2379
move.l *,2(a1,d0) - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
2390 2398 23A0 23A8 23B0 23B8 23B9
move.l *,W - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2208 2200 2200 2208 2200
21D0 21D8 21E0 21E8 21F0 21F8 21F9
move.l *,L - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2200
23D0 23D8 23E0 23E8 23F0 23F8 23F9
movem.l *,d0-d3 *128 *128 *132 *136 *132 *136 - -
0/6 0/6 2/8 6/8 0/8 0/A
RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2208 2200 2208 2200
4CD0 4CD8 4CE8 4CF0 4CF8 4CF9
movem.l d0-d3,* *128 *128 *132 *136 *132 *136
0/6 -2/6 2/8 6/8 0/8 0/A
WI5 WI5 WI5 WI5 WI5 WI5
2200 2208 2208 2200 2208 2200
48D0 48E0 48E8 48F0 48F8 48F9
movep.l d0,4(a1) -
movep.l 4(a0),d0 *128
4/2
RI5
2208
0148
neg.l * - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2208 2200 2208 2200 2200 2208
4490 4498 44A0 44A8 44B0 44B8 44B9
negx.l * - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2208 2200 2208 2200 2200 2208
4090 4098 40A0 40A8 40B0 40B8 40B9
not.l * - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2208 2200 2208 2200 2200 2208
4690 4698 46A0 46A8 46B0 46B8 46B9
or.l *,d0 - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2208 2200 2208 2200 2200 2208
8090 8098 80A0 80A8 80B0 80B8 80B9
or.l d0,* *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2200 2208 2200 2208
8190 8198 81A0 81A8 81B0 81B8 81B9
or.l #1,* - *132 *132 *132 *136 *140 *136 *128
0/6 0/6 -4/6 2/6 6/6 0/8 0/A
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2200 2208 2208 2200
0090 0098 00A0 00A8 00B0 00B8 00B9
sub.l *,d0 - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2200 2208 2200 2208 2208
9090 9098 90A0 90A8 90B0 90B8 90B9
sub.l d0,* *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
9190 9198 91A0 91A8 91B0 91B8 91B9
suba.l *,a1 - - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2208 2208 2200 2208 2200
93D0 93D8 93E0 93E8 93F0 93F8 93F9
sub.l #1,* - *132 *132 *132 *136 *140 *136 *136
0/6 0/6 -4/6 2/6 6/6 0/8 0/A
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2200 2208 2200 2200 2208 2208
0490 0498 04A0 04A8 04B0 04B8 04B9
subq.l #1,* - - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2200 2208 2200 2208
5390 5398 53A0 53A8 53B0 53B8 53B9
subx.l *,* - *124
-2/4
RI5
2200
9388
tst.l * - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -4/2 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2200 2208 2200 2208 2208 2200
4A90 4A98 4AA0 4AA8 4AB0 4AB8 4AB9
asl.w #1,* - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2200 2208 2200 2208 2208 2200
E1D0 E1D8 E1E0 E1E8 E1F0 E1F8 E1F9
asr.w #1,* - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2200 2208 2200 2208 2208 2200
E0D0 E0D8 E0E0 E0E8 E0F0 E0F8 E0F9
lsl.w #1,* - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2200 2208 2200 2208 2208 2200
E3D0 E3D8 E3E0 E3E8 E3F0 E3F8 E3F9
lsr.w #1,* - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2200 2208 2200 2208 2208 2200
E2D0 E2D8 E2E0 E2E8 E2F0 E2F8 E2F9
rol.w #1,* - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
E7D0 E7D8 E7E0 E7E8 E7F0 E7F8 E7F9
ror.w #1,* - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
E6D0 E6D8 E6E0 E6E8 E6F0 E6F8 E6F9
roxl.w #1,* - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
E5D0 E5D8 E5E0 E5E8 E5F0 E5F8 E5F9
roxr.w #1,* - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
E4D0 E4D8 E4E0 E4E8 E4F0 E4F8 E4F9
bchg #1,* - *128 *128 *128 *132 *136 *132 *136
0/4 0/4 -1/6 2/4 6/4 0/6 0/8
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
0850 0858 0860 0868 0870 0878 0879
bchg d0,* - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -1/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
0150 0158 0160 0168 0170 0178 0179
bset #1,* - *128 *128 *128 *132 *136 *132 *136
0/4 0/4 -1/6 2/4 6/4 0/6 0/8
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
08D0 08D8 08E0 08E8 08F0 08F8 08F9
bset d0,* - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -1/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
01D0 01D8 01E0 01E8 01F0 01F8 01F9
bclr #1,* - *128 *128 *128 *132 *136 *132 *136
0/4 0/4 -1/6 2/4 6/4 0/6 0/8
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
0890 0898 08A0 08A8 08B0 08B8 08B9
bclr d0,* - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -1/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
0190 0198 01A0 01A8 01B0 01B8 01B9
btst #1,* - *128 *128 *128 *132 *136 *132 *136
0/4 0/4 -1/6 2/4 6/4 0/6 0/8
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
0810 0818 0820 0828 0830 0838 0839
btst d0,* - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -1/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
0110 0118 0120 0128 0130 0138 0139
mulu *,d0 - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
C0D0 C0D8 C0E0 C0E8 C0F0 C0F8 C0F9
muls *,d0 - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2208 2208 2200 2208 2200 2200 2208
C1D0 C1D8 C1E0 C1E8 C1F0 C1F8 C1F9
abcd *,* - *124
-1/4
RI5
2208
C308
nbcd * - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -1/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2200 2208 2208 2200 2208
4810 4818 4820 4828 4830 4838 4839
sbcd *,* - *124
-1/4
RI5
2200
8308
st * - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -1/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2208 2200 2208 2200 2200
50D0 50D8 50E0 50E8 50F0 50F8 50F9
tas * - *124 *124 *128 *128 *132 *128 *132
0/2 0/2 -1/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2208 2200 2208 2200 2200
4AD0 4AD8 4AE0 4AE8 4AF0 4AF8 4AF9
move.w sr,* - *124 *124 *124 *128 *132 *128 *132
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2208 2200 2208 2200 2200
40D0 40D8 40E0 40E8 40F0 40F8 40F9
move.w *,ccr - *124 *124 *124 *128 *132 *128 *132 - - -
0/2 0/2 -2/4 2/2 6/2 0/4 0/6
RI5 RI5 RI5 RI5 RI5 RI5 RI5
2200 2208 2208 2200 2208 2200 2200
44D0 44D8 44E0 44E8 44F0 44F8 44F9
Code: Select all
BUS error late (A1)
add.w *,d0 - - - - - - - - - - - -
add.w d0,* - - - - - - -
adda.w *,a1 - - - - - - - - - - - -
add.w #1,* - - - - - - - -
addq.w #1,* - - - - - - - - -
addx.w *,* - *132
-2/4
RI5
2200
D348
and.w *,d0 - - - - - - - - - - -
and.w d0,* - - - - - - -
and.w #1,* - - - - - - - -
clr.w * - - - - - - - -
cmp.w *,d0 - - - - - - - - - - - -
cmpa.w *,a1 - - - - - - - - - - - -
cmp.w #1,* - - - - - - - -
cmpm.w (a0)+,(a1)+ *128
0/4
RI5
2200
B348
eor.w d0,* - - - - - - - -
eor.w #1,* - - - - - - - -
move.w *,d0 - - - - - - - - - - - -
move.w *,a1 - - - - - - - - - - - -
move.w *,(a1) *124 *124 *128 *128 *132 *132 *136 *132 *136 *132 *136 *128
0/4 0/4 0/4 0/4 0/4 0/6 0/6 0/6 0/8 0/6 0/6 0/6
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2204 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
3280 3288 3290 3298 32A0 32A8 32B0 32B8 32B9 32BA 32BB 32BC
move.w *,(a1)+ *124 *124 *128 *128 *132 *132 *136 *132 *136 *132 *136 *128
0/4 0/4 0/4 0/4 0/4 0/6 0/6 0/6 0/8 0/6 0/6 0/6
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2204 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
32C0 32C8 32D0 32D8 32E0 32E8 32F0 32F8 32F9 32FA 32FB 32FC
move.w *,-(a1) *128 *128 *132 *132 *136 *136 *140 *136 *140 *136 *140 *132
-2/4 -2/4 -2/4 -2/4 -2/4 -2/6 -2/6 -2/6 -2/8 -2/6 -2/6 -2/6
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2204 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
4E71 4E71 4E71 4E71 4E71 4E71 4E71 4E71 4E71 4E71 4E71 4E71
move.w *,2(a1) *128 *128 *132 *132 *136 *136 *140 *136 *140 *136 *140 *132
2/4 2/4 2/4 2/4 2/4 2/6 2/6 2/6 2/8 2/6 2/6 2/6
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2204 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
3340 3348 3350 3358 3360 3368 3370 3378 3379 337A 337B 337C
move.w *,2(a1,d0) *132 *132 *136 *136 *140 *140 *140 *124 *84 *68 *48 *32
6/4 6/4 6/4 6/4 6/4 6/6 6/6 6/6 6/8 6/6 6/6 6/6
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2204 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
3380 3388 3390 3398 33A0 33A8 33B0 33B8 33B9 33BA 33BB 33BC
move.w *,W *32 *36 *36 *40 *40 *32 *24 *8 *496 *496 *500 *0
0/4 0/4 0/4 0/4 0/4 0/6 0/6 0/6 0/8 0/6 0/6 0/6
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2204 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
31C0 31C8 31D0 31D8 31E0 31E8 31F0 31F8 31F9 31FA 31FB 31FC
move.w *,L *8 *16 *24 *32 *44 *80 *124 *136 *140 *136 *140 *132
0/6 0/6 0/4 0/4 0/4 0/6 0/6 0/6 0/8 0/6 0/6 0/8
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2204 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
33C0 33C8 33D0 33D8 33E0 33E8 33F0 33F8 33F9 33FA 33FB 33FC
movem.w *,d0-d3 - - - - - - - -
movem.w d0-d3,* - - - - - -
movep.w d0,4(a1) *128
4/2
WI5
2200
0189
movep.w 4(a0),d0 -
neg.w * - - - - - - - -
negx.w * - - - - - - - -
not.w * - - - - - - - -
or.w *,d0 - - - - - - - - - - -
or.w d0,* - - - - - - -
or.w #1,* - - - - - - - -
sub.w *,d0 - - - - - - - - - - - -
sub.w d0,* - - - - - - -
suba.w *,a1 - - - - - - - - - - - -
sub.w #1,* - - - - - - - -
subq.w #1,* - - - - - - - - -
subx.w *,* - *132
-2/4
RI5
2200
9348
tst.w * - - - - - - - -
add.l *,d0 - - - - - - - - - - - -
add.l d0,* - - - - - - -
adda.l *,a1 - - - - - - - - - - - -
add.l #1,* - - - - - - - -
addq.l #1,* - - - - - - - - -
addx.l *,* - *136
-2/4
RI5
2208
D388
and.l *,d0 - - - - - - - - - - -
and.l d0,* - - - - - - -
and.l #1,* - - - - - - - -
clr.l * - - - - - - - -
cmp.l *,d0 - - - - - - - - - - - -
cmpa.l *,a1 - - - - - - - - - - - -
cmp.l #1,* - - - - - - - -
cmpm.l (a0)+,(a1)+ *132
0/4
RI5
2208
B388
eor.l d0,* - - - - - - - -
eor.l #1,* - - - - - - - -
move.l *,d0 - - - - - - - - - - - -
move.l *,a1 - - - - - - - - - - - -
move.l *,(a1) *124 *124 *132 *132 *136 *136 *140 *136 *140 *136 *140 *132
0/4 0/4 0/4 0/4 0/4 0/6 0/6 0/6 0/8 0/6 0/6 0/8
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2208 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
2280 2288 2290 2298 22A0 22A8 22B0 22B8 22B9 22BA 22BB 22BC
move.l *,(a1)+ *124 *124 *132 *132 *136 *136 *140 *136 *140 *136 *140 *132
0/4 0/4 0/4 0/4 0/4 0/6 0/6 0/6 0/8 0/6 0/6 0/8
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2208 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200 2208
22C0 22C8 22D0 22D8 22E0 22E8 22F0 22F8 22F9 22FA 22FB 22FC
move.l *,-(a1) *128 *128 *136 *136 *140 *140 *144 *140 *144 *140 *144 *136
-2/4 -2/4 -2/4 -2/4 -2/4 -2/6 -2/6 -2/6 -2/8 -2/6 -2/6 -2/8
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
2300 2308 2310 2318 2320 2328 2330 2338 2339 233A 233B 233C
move.l *,2(a1) *128 *128 *136 *136 *140 *140 *144 *140 *104 *88 *68 20
2/4 2/4 2/4 2/4 2/4 2/6 2/6 2/6 2/8 2/6 2/6 2/8
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
2340 2348 2350 2358 2360 2368 2370 2378 2379 237A 237B 237C
move.l *,2(a1,d0) *12 *16 16 *140 *144 *144 *148 *144 *148 *144 *128 *80
6/4 6/4 6/4 6/4 6/4 6/6 6/6 6/6 6/8 6/6 6/6 6/8
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
2380 2388 2390 2398 23A0 23A8 23B0 23B8 23B9 23BA 23BB 23BC
move.l *,W *72 *72 *76 *76 *68 *52 *32 *16 *496 *496 *508 *36
0/4 0/4 0/4 0/4 0/4 0/6 0/6 0/6 0/8 0/6 0/6 0/8
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
21C0 21C8 21D0 21D8 21E0 21E8 21F0 21F8 21F9 21FA 21FB 21FC
move.l *,L *40 *48 *60 *68 *80 *116 *144 *140 *144 *140 *108 *60
0/6 0/6 0/4 0/4 0/4 0/6 0/6 0/6 0/8 0/6 0/6 0/A
WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5 WI5
2200 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200 2200
23C0 23C8 23D0 23D8 23E0 23E8 23F0 23F8 23F9 23FA 23FB 23FC
movem.l *,d0-d3 - - - - - - - -
movem.l d0-d3,* - - - - - -
movep.l d0,4(a1) *128
4/2
WI5
2208
01C9
movep.l 4(a0),d0 -
neg.l * - - - - - - - -
negx.l * - - - - - - - -
not.l * - - - - - - - -
or.l *,d0 - - - - - - - - - - -
or.l d0,* - - - - - - -
or.l #1,* - - - - - - - -
sub.l *,d0 - - - - - - - - - - - -
sub.l d0,* - - - - - - -
suba.l *,a1 - - - - - - - - - - - -
sub.l #1,* - - - - - - - -
subq.l #1,* - - - - - - - - -
subx.l *,* - *136
-2/4
RI5
2208
9388
tst.l * - - - - - - - -
asl.w #1,* - - - - - - - -
asr.w #1,* - - - - - - - -
lsl.w #1,* - - - - - - - -
lsr.w #1,* - - - - - - - -
rol.w #1,* - - - - - - - -
ror.w #1,* - - - - - - - -
roxl.w #1,* - - - - - - - -
roxr.w #1,* - - - - - - - -
bchg #1,* - - - - - - - -
bchg d0,* - - - - - - - -
bset #1,* - - - - - - - -
bset d0,* - - - - - - - -
bclr #1,* - - - - - - - -
bclr d0,* - - - - - - - -
btst #1,* - - - - - - - -
btst d0,* - - - - - - - -
mulu *,d0 - - - - - - - - - - -
muls *,d0 - - - - - - - - - - -
abcd *,* - *132
-1/4
RI5
2208
C308
nbcd * - - - - - - - -
sbcd *,* - *132
-1/4
RI5
2200
8308
st * - - - - - - - -
tas * - - - - - - - -
move.w sr,* - - - - - - - -
move.w *,ccr - - - - - - - - - - -
Code: Select all
Name : Dn An (A) (A)+ -(A) $(A) I(A) .W .L $(P) I(P) #
ADDRESS error early (A0)
add.w *,d0 - - *56 *56 *60 *60 *64 *60 *64 *60 *64 -
1/2 1/2 -1/4 3/2 7/2 1/4 1/6 7/2 B/2
RI5 RI5 RI5 RI5 RI5 RI5 RI5 RI6 RI6
2208 2208 2200 2208 2200 2200 2208 2200 2208
D050 D058 D060 D068 D070 D078 D079 D07A D07B
"A limited arithmetic unit is located in the HIGH and LOW sections, and a general capability arithmetic and logical unit is located in the DATA section. This allows address and data calculations to occur simultaneously. For example, it is possible to do a register-to-register word addition concurrently with a program counter increment".
Dio wrote:The microcode will probably explain all this fairly thoroughly, so roll on the project to get a human-readable version of it.
danorf wrote:Interesting facts about AUs that I can remember :
they have 6 operations : +1, +2, +4 and -1, -2, -4
Code: Select all
.B, .W .L
Dn PC(?) PC(?)
An PC(?) PC(?)
(An) PC PC(?)
(An)+ PC PC(?)
–(An) PC+2 PC
(d16, An) PC PC(?)
(d8, An, Xn) PC PC(?)
(xxx).W PC+2 PC+2(?)
(xxx).L PC+4 PC+4(?)
(d16, PC) PC PC(?)
(d8, PC, Xn) PC PC(?)
#<data> PC+2 PC+4
Code: Select all
b543 b210 Mode .B, .W .L
000 R Dn PC PC
001 R An PC PC
010 R (An) PC PC
011 R (An)+ PC PC
100 R –(An) PC+2 PC
101 R (d16, An) PC PC
110 R (d8, An, Xn) PC PC
111 000 (xxx).W PC+2 PC+2
111 001 (xxx).L PC+4 PC+4
111 010 (d16, PC) PC PC
111 011 (d8, PC, Xn) PC PC
111 100 #<data> PC+2 PC+4
Steven Seagal wrote:![]()
Certainly thought they did more, like indexing (D16+An etc.)
Steven Seagal wrote:Hey I looked at the microcodes for ADD -(An),D0 and here are some partial insights:
- All 'get <EA>' parts use the same routines in all instructions, so it's not that horrible.
- At the end of an instruction, AU = PC+2 (haven't checked all!).
- For EA=-(An), there is a strange AU->PC as first move of the routine, which explains value of PC. Note that it isn't prefetch.
This confirms the table for this case.
So in my theory I would add:
"if there's a crash during 'get <EA>' and it's -(An), we make 'PC+2'."
Dio wrote::D
Note that I doubt all instructions use exactly the same EA access rules. movem is one example, and another is move.w d0,* - it looks like the EA setup for the destination address always sees the clock cycles of the fetches for the destination EA calculation, whatever the addressing mode is. This is different to add d0,* for example. I imagine that these are relatively rare though.
danorf wrote:The <EA> calculation routs are the easy part (some intructions will be really hard to trace and provides many ways of having an address error or a bus error).
You're right for -(An) case (PC+2 form start) (and it's the same for (d16,An)) but only for .w instructons (it's different with .l) (AU value is a little more complex to find).
For oter <EA> calculation it's not so simple and PC and AU will not be the same if the instruction is interreupted by an address error or a bus error.
Code: Select all
b543 b210 Mode .B, .W .L
000 R Dn PC PC
001 R An PC PC
010 R (An) PC PC
011 R (An)+ PC PC
100 R –(An) PC+2 PC
101 R (d16, An) PC PC
110 R (d8, An, Xn) PC PC
111 000 (xxx).W PC+2 PC+2
111 001 (xxx).L PC+4 PC+4
111 010 (d16, PC) PC PC
111 011 (d8, PC, Xn) PC PC
111 100 #<data> PC+2 PC+4
Steven Seagal wrote:Do you agree that for B/A exceptions, PC is pushed and not, say, AU or a computed value?
Code: Select all
at= address curently on the address bus
bser1 au = pc
ftu = psw
bser2 alu = au = pcl
au = sp-2
write alu at au <--> write pcl at sp-2
bser3 alu = ftu = psw
au = sp-6
write alu at au <--> write psw at sp-6
bser4 alu = pch
ftu = ird
au = sp-4
write alu at au <--> write pch at sp-4
bser5 alu = ftu = ird
au = sp-8
write alu at au <--> write ird at sp-8
alu = atl = address on the address bus when error occurs
bser6 pc = at = address on the address bus when error occurs
ftu = ssw
au = sp-10
write alu at au <--> write atl at sp-10
trap3 alu = ftu = ssw
au = au-4 = sp-14
write alu at au and sp=au <--> write ssw at sp-14
trap4 sp = sp-14
alu = pch = ath
au = au+2 = old_sp-12 = new_sp+2
trap5 write alu at au <--> write ath at old_sp-12 (new_sp+2)
...
...
...
... ...
...
Steven Seagal wrote:Is it right that all instructions that use <EA> routine also make 'PC=AU' as first step of their proper routine, so that AU counts, not PC, for the CPU at the end of <EA>?
Steven Seagal wrote:For MOVEM, are the microcodes called STM... and LDM...? It seems there are conflicting names in the patent.
Code: Select all
M --> R
.W or .L
(An) ldmr1
(An)+ popm1
(d16,An) ldmd1
(d8,An,Xn) ldmx0
(xxx).W lmaw1
(xxx).L lmal1
R --> M
.W or .L
(An) stmr1
-(An) push1
(d16,An) stmd1
(d8,An,Xn) stmx1
(xxx).W smaw1
(xxx).L smal1
Steven Seagal wrote:For MOVEM to Memory, does prefetch occur before writing to memory?
Code: Select all
R --> M | |
.W | |
(An) | 8+4m(2/m) | np (nw)* np
-(An) | 8+4m(2/m) | np (nw)* np
(d16,An) | 12+4m(3/m) | np np (nw)* np
(d8,An,Xn) | 14+4m(3/m) | np n np (nw)* np
(xxx).W | 12+4m(3/m) | np np (nw)* np
(xxx).L | 16+4m(4/m) | np np np (nw)* np
.L | |
(An) | 8+8m(2/2m) | np (nW nw)* np
-(An) | 8+8m(2/2m) | np (nw nW)* np
(d16,An) | 12+8m(3/2m) | np np (nW nw)* np
(d8,An,Xn) | 14+8m(3/2m) | np n np (nW nw)* np
(xxx).W | 12+8m(3/2m) | np np (nW nw)* np
(xxx).L | 16+8m(4/2m) | np np np (nW nw)* np
Steven Seagal wrote:Are there microcodes for exceptions? What would be the name for 'bus error'?
Steven Seagal wrote:When the CPU needs the value in IRC, it may in fact read an intermediary register instead? (like 'dbin')
Steven Seagal wrote:And when the CPU takes that IRC value (takes no read cycles), it fetches at once to fill it again, so that our timings are right?
Steven Seagal wrote:(sorry for all the questions!)
A bus error exception occurs when the external logic requests that a bus error be
processed by an exception. The current bus cycle is aborted. The current processor
activity, whether instruction or exception processing, is terminated, and the processor
immediately begins exception processing.
An address error exception occurs when the processor attempts to access a word or longword
operand or an instruction at an odd address. An address error is similar to an
internally generated bus error. The bus cycle is aborted, and the processor ceases current
processing and begins exception processing.
When a bus error or an address error occurs, it always occurs on the beginning of the execution of the nanoword that read or write on the data bus (S4 bus state).
Every registers value modifications that have been done before this point (in previous nanowords execution) must be considered as done and effective.
Every registers value modifications that should be done after this point (in the current nanoword and the following ones if any) must be considered as not done and non effective.
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