DMA sound mysteries

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Foxie
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DMA sound mysteries

Postby Foxie » Sun Feb 14, 2016 9:56 pm

I'm using a short looped circular buffer. Two things have been puzzling me -

"Frame end address" ($ff890f / $ff8911 / $ff8913) - does this address ever get reached? Or should it point to the first non-audio word beyond the end of the buffer? In other words is it audio_start_address+audio_length, or audio_start_address+audio_length-2 ?

One of the STE programming guides says that you shouldn't access the shifter registers immediately after writing the DMA sound registers, but instead should "wait a few cycles." Does anyone know what the minimum acceptable delay is? I can't afford to wait a VBL.

My initial experiments to answer the first question leave me even more confused. In Hatari, the end address is never reached, so far so good. But in Steem, the end address *is* reached, $ff8909-$ff890d match $ff890f-$ff8913 for a brief period. But unless I'm mistaken, I can't actually hear the last sample - so it's as if Steem never actually plays the end address (like Hatari), but for some reason reports reaching it?! Perhaps the registers briefly indicate reaching the end address, before the hardware detects it and resets back to the start?

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Re: DMA sound mysteries

Postby npomarede » Sun Feb 21, 2016 2:14 pm

Hi
in the official Atari STE HW manual, they state "the end address of a frame is actually the address of the first byte in memory beyond the frame ; a frame starting at 21100 which is 10 bytes long has an end address of 21110".
So, from this it's clear that the byte/words at "frame end address" should not be played.

As for "current address" reaching "end address" and staying there for a few cycles or not, I haven't checked that, but I have an old test program that I could try on my STE (it depends on whether the DMA FIFO does "read a word then check end address" or "check end address then read a word").
But the doc also states "the frame address counter holds the address of the next sample word to be fetched", so it would mean that current address should not reach end address, but maybe HW is different from the doc.

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Re: DMA sound mysteries

Postby Foxie » Wed Feb 24, 2016 5:29 pm

Thanks for confirming this ^.^

Considering the registers point to the next word to be fetched, I suppose it makes sense that it might go beyond the end address. I haven't tested this yet, but my guess is that the current address will equal the end address while it's playing the last sample, then it will reset to show start address plus 1 (while playing the start address exactly). In other words, it never equals the start address, because it shows the end address instead.

I'm still puzzled about the "wait some cycles before accessing shifter registers" thing. I've got a delay of a few hundred cycles in there and it seems to work, but that might just be because I only access the shifter registers occasionally. Not waiting long enough is supposed to mess up the screen display, though I've never seen this happen?

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Re: DMA sound mysteries

Postby npomarede » Wed Feb 24, 2016 5:38 pm

Foxie wrote:Thanks for confirming this ^.^

Considering the registers point to the next word to be fetched, I suppose it makes sense that it might go beyond the end address. I haven't tested this yet, but my guess is that the current address will equal the end address while it's playing the last sample, then it will reset to show start address plus 1 (while playing the start address exactly). In other words, it never equals the start address, because it shows the end address instead.

Could be this way also ; it all depends on when current address is incremented and checked against end address, needs to be confirmed on real STE
I'm still puzzled about the "wait some cycles before accessing shifter registers" thing. I've got a delay of a few hundred cycles in there and it seems to work, but that might just be because I only access the shifter registers occasionally. Not waiting long enough is supposed to mess up the screen display, though I've never seen this happen?

Never heard of this. I really don't see why we should wait some cycles to access the shifter. The only relation I know between shifter and dma sound is that DMA sound's FIFO is refilled at the end of each video line (if needed) when display is OFF (showing border color) ; in other words, DMA sound will access memory as soon as the shifter/mmu doesn't access it anymore.
As many STE demos are mixing plasma/overscan and DMA sound, this "wait some cycles rules" seems unlikely to be true.

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Re: DMA sound mysteries

Postby npomarede » Thu Feb 25, 2016 10:33 am

npomarede wrote:
npomarede wrote:
Foxie wrote:Thanks for confirming this ^.^

Considering the registers point to the next word to be fetched, I suppose it makes sense that it might go beyond the end address. I haven't tested this yet, but my guess is that the current address will equal the end address while it's playing the last sample, then it will reset to show start address plus 1 (while playing the start address exactly). In other words, it never equals the start address, because it shows the end address instead.

Could be this way also ; it all depends on when current address is incremented and checked against end address, needs to be confirmed on real STE

Hi
I ran the small test program I made some years ago on my STE ; this program plays DMA sound and repeatedly read current sample address in a loop. This gives a precision of 12 cycles (which should be enough in that case), and with this current address never reaches end address.
For example if you play from $10000 to $1000c in a loop, current sample address will be at max $1000a, then it will be $10000 on the next DMA read. This is the same behaviour under Hatari. So, this matches the description in the official Atari STE HW doc addendum.

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Re: DMA sound mysteries

Postby Foxie » Thu Mar 03, 2016 1:32 am

npomarede wrote:For example if you play from $10000 to $1000c in a loop, current sample address will be at max $1000a, then it will be $10000 on the next DMA read. This is the same behaviour under Hatari. So, this matches the description in the official Atari STE HW doc addendum.


Interesting, so this seems to be a Steem bug? Thanks for doing the test, it clears this up nicely ^.^

The thing about the shifter registers I think only applies if you access the shifter registers immediately after writing to the sound registers. Since a lot of programs only write to the sound registers once (to switch DMA on), I suppose there isn't much of a chance for things to go wrong. I can't imagine what kind of hardware bug would cause the display to get corrupted though.

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Re: DMA sound mysteries

Postby npomarede » Thu Mar 03, 2016 1:50 pm

Foxie wrote:The thing about the shifter registers I think only applies if you access the shifter registers immediately after writing to the sound registers. Since a lot of programs only write to the sound registers once (to switch DMA on), I suppose there isn't much of a chance for things to go wrong. I can't imagine what kind of hardware bug would cause the display to get corrupted though.

I would be interested to know the name of the doc that says this about shifter regs. As I wrote, the shifter has some kind of priority over the dma sound, because the dma can fill its fifo only when "display enabled" signal is off (in the left border). As far as I can tell, this looks like a wrong info.

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Re: DMA sound mysteries

Postby Cyprian » Thu Mar 03, 2016 2:34 pm

Isn't DMA Audio FIFO part of STE Shifter?
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Re: DMA sound mysteries

Postby npomarede » Thu Mar 03, 2016 2:42 pm

Cyprian wrote:Isn't DMA Audio FIFO part of STE Shifter?

Yes, as can be seen here for example http://info-coach.fr/atari/hardware/STE-HW.php
The STE GST Shifter includes pins to LMC1992 and DMA sound pins (it's also connected to the GST MCU, which is the successor of the STF's MMU chip)

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Re: DMA sound mysteries

Postby Cyprian » Thu Mar 03, 2016 3:41 pm

We know that STE Shifter have some issues related to horizontal fine-scrolling. Also we know that there is another issue related to Full Screen and DMA Sound (described by Evil/DHS ). Therefore we can't exclude that there is another Shifter issue, related to DMA Sound.
But would be cool to recognize where exactly the problem lies, and have a code which causes that issue.
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Re: DMA sound mysteries

Postby npomarede » Thu Mar 03, 2016 4:10 pm

Are you sure Evil reported a problem with fullscreen and DMA ? I remembered some years ago I wondered if dma sound could work at 56 kHz stereo when using 230 byte overscan (are there enough slots left to refill the dma fifo each line), but as far as I remember Evil did not have time to check this.
What is sure and verified on real STE, is that when you start dma sound in the middle of a displayed line, then the fifo will start filling at the end of the line, when 'display enable' is off. So, starting DMA sound does not alter display.

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Re: DMA sound mysteries

Postby Cyprian » Thu Mar 03, 2016 5:49 pm

hmm, I'm not able to find that post now.
If I remember correctly it was about loosing fullscreen stability during starting/stopping DMA Sound. The workaround was to use DMA Sound in the loop mode.

----EDITED----
Found it: http://dhs.nu/bbs-coding/index.php?request=4859
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Re: DMA sound mysteries

Postby Foxie » Thu Mar 03, 2016 6:48 pm

npomarede wrote:I would be interested to know the name of the doc that says this about shifter regs.


It's about half way through this document: http://www.atari-wiki.com/?title=Atari_ ... _/_Paradox

? Argh, i have now implemented DMA-sound to my program and now
my whole screen-management goes wild
! This easily happens. The DMA-sound subsystem of the STE houses
the "shifting logic" in the STE-Shifter. When starting the DMA
sound to play a sample, you should not try to access the Shifter's
registers directly afterwards but "wait" a few cycles.
The simplest solution is to wait a single VBL after starting
the DMA-sound before proceeding with your program.
Once the DMA-sound plays, you can change DMA-sound registers
without risking to screw up screen management.


It seems very vague, but the sentence "this easily happens" concerns me. It specifically looks like something that happens in the cycles immediately following switching DMA on. I've no idea if it's tied to VBL, perhaps access during VBL is the problem like with scrolling?


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