FX68K Cycle accurate 68000 core

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Re: FX68K Cycle accurate 68000 core

Postby Smonson » Mon Nov 19, 2018 7:58 am

Congratulations Ijor. This completed project surely represents a vast amount of work.

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Re: FX68K Cycle accurate 68000 core

Postby Total Eclipse » Mon Nov 19, 2018 8:05 am

ijor wrote:I plan to port FX CAST (see viewtopic.php?f=117&t=34555&start=75) to the MiST. And, of course, MasterOfGizmo is more than welcome to use FX68K on his own ST core if he wants. But there is a trade off, TG68K might be better for STeroids mode.

I don't want to derail this thread too much, but wanted to ask how accurate the rest of the modules in the core are?

Tills own ST core runs many games, but fails on a number of demos, I'm curious as to how much of that incompatibility is down to CPU timings, and how much could be bugs in the implementation of the other components?

Anyhow ijor, it looks like you've done an amazing job. I can't wait to see the MiST version and test out The Cuddly Demos.
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Re: FX68K Cycle accurate 68000 core

Postby JimDrew » Mon Nov 19, 2018 7:13 pm

If you remove the cycle exact accuracy of the FX CAST core, it runs at about 60MHz on the Replay board. :)
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Re: FX68K Cycle accurate 68000 core

Postby MasterOfGizmo » Mon Nov 19, 2018 9:46 pm

Does that mean that FX CAST comes with the same license as the other replay cores which doesn't allow it to be run on anything but replay hardware?
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Re: FX68K Cycle accurate 68000 core

Postby ijor » Mon Nov 19, 2018 10:01 pm

MasterOfGizmo wrote:Does that mean that FX CAST comes with the same license as the other replay cores which doesn't allow it to be run on anything but replay hardware?


Of course not. It will certainly be free to be used on MiST, Replay, or any other system for that matter.

Jim probably meant FX68K (the 68000 part of the core only), and not FX CAST. Mike is experimenting with FX68K and his own Amiga core, and I assume that's what Jim is referring. And regarding the FX68K, you already seen that it was released with a GPL license.

Edit: Not sure why you assumed I would restrict my own work to the Replay Board. I have an excellent relation with Mike, but that's all, we don't have any commercial relation whatsoever.
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Re: FX68K Cycle accurate 68000 core

Postby JimDrew » Tue Nov 20, 2018 1:19 am

Yes, I was referring to the 68K core. However, Mike's cores are certainly not limited to the Replay. You will find them in everything from MiST to Papillio sample projects - but I am guessing that you already know that.
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Re: FX68K Cycle accurate 68000 core

Postby MasterOfGizmo » Tue Nov 20, 2018 4:34 pm

Imho there were 3rd party cores for the replay that had such a restriction.

Anyway, making it open source sure will make it a success.
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Re: FX68K Cycle accurate 68000 core

Postby mk79 » Sun Feb 10, 2019 11:40 pm

Thanks a lot for this core! Without any prior knowledge of FPGA development I eventually managed to integrate FX68K into MiSTer's Sinclair QL core. 25 years ago I've developed a 68k emulator and I'm the main developer of the current QL operating systems, so I'm generally comfortable with logic, but all the FPGA specific stuff like timing analyzers and clock skews scares me ;)

ijor wrote:On Cyclone families it uses just over 5,100 LEs and about 5KB internal ram, reaching a max effective clock frequency close to 40MHz. Some optimizations are still possible to implement and increase the performance.

Despite my mentioned ignorance I managed to implement my own asynchronous SDRAM controller for the core and the whole system now runs very stable at 94.5Mhz (47.25Mhz effective 68K clock). I have a suite that checks common arithmetic commands against the results of a real 68k processor, which even at this speed, takes a few days to complete. I've got problems at 105Mhz, not sure if it's the core or anything around it as the problem manifests itself during loading of the reference data, but at 94.5Mhz it runs stable for days. It has however uncovered one minor bug in the core:

ABCD, SBCD and NBCD have the Z flag defined as "Cleared if the result is nonzero; unchanged otherwise.". On FX68K these instructions also set the Z flag.
sbcd.png

MasterOfGizmo wrote:Yes that's missing in tg68k and requires us to just stall the CPU by brute force. But of course that prevents a few things like a proper tas instruction. But it's interesting how close you can get by just stopping the CPU clock externally :-)
The reason I went with FX68K is that the QL's SD-card driver expects some specific (= slow) timing when accessing the hardware. I tried to do this with tg68k by disabling the clock during an access. Generally it works fine, but my 68k test suite always reported spurious errors every few hours that cannot be reproduced, so there might be scary side effects. When tg68k is clocked slow enough to not need any additional halts the suite runs to completion without error (but then takes 2 weeks or something like that 8O ).

All the best, Marcel
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Re: FX68K Cycle accurate 68000 core

Postby ijor » Wed Feb 13, 2019 11:53 am

mk79 wrote:Thanks a lot for this core! Without any prior knowledge of FPGA development I eventually managed to integrate FX68K into MiSTer's Sinclair QL core. 25 years ago I've developed a 68k emulator and I'm the main developer of the current QL operating systems, so I'm generally comfortable with logic, but all the FPGA specific stuff like timing analyzers and clock skews scares me ;)


Nice job. Congratulations! :)

Despite my mentioned ignorance I managed to implement my own asynchronous SDRAM controller for the core and the whole system now runs very stable at 94.5Mhz (47.25Mhz effective 68K clock). I have a suite that checks common arithmetic commands against the results of a real 68k processor, which even at this speed, takes a few days to complete. I've got problems at 105Mhz, not sure if it's the core or anything around it as the problem manifests itself during loading of the reference data, but at 94.5Mhz it runs stable for days.


This might be a bit off topic, but running stable for days is not the correct way to verify a core. You have to make a proper timing analysis.

It has however uncovered one minor bug in the core: ABCD, SBCD and NBCD have the Z flag defined as "Cleared if the result is nonzero; unchanged otherwise.". On FX68K these instructions also set the Z flag.sbcd.png


This seems to be a bug regression. I definitely verified this and there is specific code to handle this:

Code: Select all

   // Not described, but should be used also for instructions
   //   that clear but not set Z (ADDX/SUBX/ABCD, etc)!
   logic [4:0] ccrMasked;
   always_comb begin
      ccrMasked = (ccrTemp & ccrMask) | (pswCcr & ~ccrMask);
      if( finish | isCorf | isArX)
         ccrMasked[ ZF] = ccrTemp[ ZF] & pswCcr[ ZF];
   end


But the bug seems to affect the previous operation before applying the decimal correction factor. Will send you a fixed code to test it later if you can. Please watch your PM.

Thanks.
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Re: FX68K Cycle accurate 68000 core

Postby mk79 » Wed Feb 13, 2019 1:32 pm

ijor wrote:This might be a bit off topic, but running stable for days is not the correct way to verify a core. You have to make a proper timing analysis.
Of course you're right, but that's the point where I'm out of my depth, knowledge wise. On the other hand, for a pure fun hobby project without any service level agreement "runs fine for days" works for me for so far ;-)

But the bug seems to affect the previous operation before applying the decimal correction factor. Will send you a fixed code to test it later if you can. Please watch your PM.
Will gladly test it when I'm at home in the evening. Thanks a lot!

Cheers, Marcel

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Re: FX68K Cycle accurate 68000 core

Postby mk79 » Thu Feb 14, 2019 8:11 pm

ijor wrote:But the bug seems to affect the previous operation before applying the decimal correction factor. Will send you a fixed code to test it later if you can. Please watch your PM.
Apparently I don't have the right to answer via PM (yet), but I have tested the patch now and it works as expected, thank you very much!

sbcd.png
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Re: FX68K Cycle accurate 68000 core

Postby ijor » Fri Feb 15, 2019 2:04 am

mk79 wrote:
ijor wrote:This might be a bit off topic, but running stable for days is not the correct way to verify a core. You have to make a proper timing analysis.
Of course you're right, but that's the point where I'm out of my depth, knowledge wise. On the other hand, for a pure fun hobby project without any service level agreement "runs fine for days" works for me for so far ;-)


That's exactly the point. It works for you. But it might fail for somebody else. But I do certainly understand that a hobby project might tolerate some failure rate.

Apparently I don't have the right to answer via PM (yet), but I have tested the patch now and it works as expected, thank you very much!


Thanks to you for the bug report and the testing!
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Re: FX68K Cycle accurate 68000 core

Postby ijor » Sat Feb 16, 2019 12:18 pm

Pushed the changes to github: https://github.com/ijor/fx68k

- Fixed regression bug that affected flags on BCD instructions.
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