Undocumented F030 hardware addresses...

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Greenious
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Undocumented F030 hardware addresses...

Postby Greenious » Wed Jul 05, 2017 11:52 pm

Alright, where to begin...

A month ago or so, in another thread, I talked about undocumented adresses being present in F030, but got shot down.

Here is the research I did some 20+ years ago, when the F030 was released, and noone really had any clue as to how the hardware worked.

What I did was to basically write a small assembler program that would scan the entire hardware memory space for adresses that did not result in a buserror, and what you see below is the result. Most of the adresses is known. I filled out what I found out at the time, but some are not...

First value is the address, followed by the value read from it. The way the databus is built, with pullup resistors on the databus, those giving the value $ffff are likely shadows given off as a result of unsufficient address decoding. Much the same way the PSG in the ST fills the entire FFFF88xx space.

But some are not just $ffff, and are still undocumented... There might be some fun to be had here, or not, I don't know, but it would be really cool if these addresses could finally be deciphered for what it is...

I will keep going through my older stuff, and if I find the source of my program I'll post it here. Maybe some fun can be had from ST/STE/TT aswell.

Code: Select all

   ---+++*** IDE Controller ***+++---
$fff00000 [R/W] L  Data Register
$fff00005 [R/-] B  Error Status Register
$fff00006 $ffff    *UNKNOWN*      (IBM-compatibles use these registers)
$fff00009 [-/W] B  Sector Count Register
$fff0000a $ffff    *UNKNOWN*      (for the second IDE-drive, but that)
$fff0000d [-/W] B  Sector Number Register
$fff0000e $ffff    *UNKNOWN*      (is probably not available on F030)
$fff00011 [-/W] B  Cylinder Low Register
$fff00012 $ffff    *UNKNOWN*      Cylinder Low Register Drive 2?
$fff00015 [-/W] B  Cylinder High Register
$fff00016 $ffff    *UNKNOWN*      CHR drive 2?
$fff00019 [-/W] B  Drive Head Register
$fff0001a $ffff    *UNKNOWN*      DHR drive 2?
$fff0001d [R/W] B  Status/Command Register
$fff0001e $ffff    *UNKNOWN*      S/C R drive 2?
$fff00020 $ffff    *UNKNOWN*
$fff00022 $ffff    *UNKNOWN*
$fff00024 $ffff    *UNKNOWN*
$fff00026 $ffff    *UNKNOWN*
$fff00028 $ffff    *UNKNOWN*
$fff0002a $ffff    *UNKNOWN*
$fff0002c $ffff    *UNKNOWN*
$fff0002e $ffff    *UNKNOWN*
$fff00030 $ffff    *UNKNOWN*
$fff00032 $ffff    *UNKNOWN*
$fff00034 $ffff    *UNKNOWN*
$fff00036 $ffff    *UNKNOWN*
$fff00039 [R/W] B  Alternate Status/Data Output - Register
$fff0003a $ffff    *UNKNOWN*      A S/D R drive 2?
$fff0003c $ffff    *UNKNOWN*
$fff0003e $ffff    *UNKNOWN*

   ---+++*** Memory Managment Unit ***+++---
$ffff8001 [R/W]   B  MMU Memory Configuration
$ffff8006 [R/W]   B  Monitor Type(?)
$ffff8007 [R/W]   B  Falcon Bus Status/Control(?)
$ffff800c  $4a00   *UNKNOWN*

   ---+++*** Video System ***+++---
$ffff8201 [R/W]   B  Video Screen Memory Position, HI
$ffff8203 [R/W]   B  Video Screen Memory Position, MI
$ffff8205 [R/W]   B  Video Address Counter, HI
$ffff8207 [R/W]   B  Video Address Counter, MI
$ffff8209 [R/W]   B  Video Address Counter, LO
$ffff820a [R/W]   B  Video Synchronisation mode
$ffff820d [R/W]   B  Video Screen Memory Position, LO
$ffff820e [R/W]   W  Offset to Next Scanline
$ffff8210 [R/W]   W  Scanline Wordlenght
$ffff8212  $ffff   *UNKNOWN*
$ffff8214  $ffff   *UNKNOWN*
$ffff8216  $ffff   *UNKNOWN*
$ffff8218  $ffff   *UNKNOWN*
$ffff821a  $0000   *UNKNOWN*
$ffff821c  $ffff   *UNKNOWN*
$ffff821e  $ffff   *UNKNOWN*
$ffff8220  $ffff   *UNKNOWN*
$ffff8222  $ffff   *UNKNOWN*
$ffff8224  $ffff   *UNKNOWN*
$ffff8226  $ffff   *UNKNOWN*
$ffff8228  $ffff   *UNKNOWN*
$ffff822a  $0000   *UNKNOWN*
$ffff822c  $ffff   *UNKNOWN*
$ffff822e  $ffff   *UNKNOWN*
$ffff8230  $ffff   *UNKNOWN*
$ffff8232  $ffff   *UNKNOWN*
$ffff8234  $ffff   *UNKNOWN*
$ffff8236  $ffff   *UNKNOWN*
$ffff8238  $ffff   *UNKNOWN*
$ffff823a  $0000   *UNKNOWN*
$ffff823c  $ffff   *UNKNOWN*
$ffff823e  $ffff   *UNKNOWN*
$ffff8240 [R/W]   W  ST(E)-compatible palette-registers 0-15 as follows
    -              ST:  ---- -RRR -GGG -BBB
$ffff825e [R/W]   W  STE: ---- rRRR gGGG bBBB arranged bitorder is:0 3 2 1
$ffff8260 [R/W]   B  Shifter Resolution
$ffff8262  $0000   *UNKNOWN*
$ffff8265 [R/W]   B  Horizontal Scroll Register (0-15)
$ffff8266 [R/W]   W  SPShift  (SparrowShift?!?)
$ffff8268  $0000   *UNKNOWN*
$ffff826a  $0000   *UNKNOWN*
$ffff826c  $0000   *UNKNOWN*
$ffff826e  $0000   *UNKNOWN*
$ffff8270  $0000   *UNKNOWN*
$ffff8272  $0000   *UNKNOWN*
$ffff8274  $0000   *UNKNOWN*
$ffff8276  $0000   *UNKNOWN*
$ffff8278  $0000   *UNKNOWN*
$ffff827a  $0000   *UNKNOWN*
$ffff827c  $0000   *UNKNOWN*
$ffff827e  $0000   *UNKNOWN*
$ffff8280 [R/-]   W  HHC - Horizontal Hold Counter
$ffff8282 [R/W]   W  HHT - Horizontal Hold Timer
$ffff8284 [R/W]   W  HBB - Horizontal Border Begin
$ffff8286 [R/W]   W  HBE - Horizontal Border End
$ffff8288 [R/W]   W  HDB - Horizontal Display Begin
$ffff828a [R/W]   W  HDE - Horizontal Display End
$ffff828c [R/W]   W  HSS - Horizontal
$ffff828e [R/W]   W  HFS - Horizontal
$ffff8290 [R/W]   W  HEE - Horizontal
$ffff8292  $0000   *UNKNOWN*
$ffff8294  $0000   *UNKNOWN*
$ffff8296  $0000   *UNKNOWN*
$ffff8298  $0000   *UNKNOWN*
$ffff829a  $0000   *UNKNOWN*
$ffff829c  $0000   *UNKNOWN*
$ffff829e  $0000   *UNKNOWN*
$ffff82a0 [R/-]   W  VFC - Vertical Frequency Counter
$ffff82a2 [R/W]   W  VFT - Vertical Frequency Timer
$ffff82a4 [R/W]   W  VBB - Vertical Border Begin
$ffff82a6 [R/W]   W  VBE - Vertical Border End
$ffff82a8 [R/W]   W  VDB - Vertical Display Begin
$ffff82aa [R/W]   W  VDE - Vertical Display End
$ffff82ac [R/W]   W  VSS - Vertical SS
$ffff82ae  $0000   *UNKNOWN*
$ffff82b0  $0000   *UNKNOWN*
$ffff82b2  $0000   *UNKNOWN*
$ffff82b4  $0000   *UNKNOWN*
$ffff82b6  $0000   *UNKNOWN*
$ffff82b8  $0000   *UNKNOWN*
$ffff82ba  $0000   *UNKNOWN*
$ffff82bc  $0000   *UNKNOWN*
$ffff82be  $0000   *UNKNOWN*
$ffff82c0 [R/W]   W  Video Clock(?)
$ffff82c2 [R/W]   W  VCO - Video Control

   ---+++*** DMA/FDC-Controller ***+++---
$ffff8604 [R/W]   W  FDC access/sector count
$ffff8606 [R/W]   W  DMA Status/Mode
$ffff8609 [R/W]   B  DMA address counter/Base, HI
$ffff860b [R/W]   B  DMA address counter/Base, MI
$ffff860d [R/W]   B  DMA address counter/Base, LO
$ffff860e  $008b   Switch HD/DD floppy

   ---+++*** PSG AY-3-8910 Soundchip ***+++---
$ffff8800 [R/W]   B  PSG read data/register select
$ffff8802 [-/W]   B  PSG write data

   ---+++*** CODEC, PCM, DMA-sound ***+++---
$ffff8900 [R/W]   B  Buffer interrupts
$ffff8901 [R/W]   B  DMA Control Register
$ffff8903 [R/W]   B  Frame Start Address, HI
$ffff8905 [R/W]   B  Frame Start Address, MI
$ffff8907 [R/W]   B  Frame Start Address, LO
$ffff8909 [R/-]   B  Frame Address Counter, HI
$ffff890b [R/-]   B  Frame Address Counter, MI
$ffff890d [R/-]   B  Frame Address Counter, LO
$ffff890f [R/W]   B  Frame End Address, HI
$ffff8911 [R/W]   B  Frame End Address, MI
$ffff8913 [R/W]   B  Frame End Address, LO
$ffff8920 [R/W]   B  DMA Track Control
$ffff8921 [R/W]   B  Sound Mode Control
$ffff8922  $0000   !!!  MicroWire Interface  !!!
$ffff8924  $0000   !!! NOT available in F030 !!!
$ffff8930 [R/W]   W  Crossbar Source Controller
$ffff8932 [R/W]   W  Crossbar Destination Controller
$ffff8934 [R/W]   B  External Clock Frequency Divider
$ffff8935 [R/W]   B  Internal Clock Frequency Divider
$ffff8936 [R/W]   B  Record Tracks Select
$ffff8937 [R/W]   B  CODEC Input Source from 16bit adder
$ffff8938 [R/W]   B  CODEC ADC L+R Channel Input Select
$ffff8939 [R/W]   B  Channel Amplification
$ffff893a [R/W]   B  Channel Attenuation (TOS handles it like a word-register?)
$ffff893c [R/W]   W  CODEC Status
$ffff893e  $a100   *UNKNOWN* (This byte is some sort of counter/timer?)
$ffff8941 [R/W]   B  GPIO Data Direction
$ffff8943 [R/W]   B  GPIO Data Port

   ---+++*** Real Time Clock ***+++---
$ffff8961 [-/W]   B  Real Time Clock Register Select
$ffff8963 [R/W]   B  Real Time Clock Data Register

   ---+++*** BLiTTER ***+++---
$ffff8a00 [R/W]   W  Halftone-RAM Word 0
    -
$ffff8a1e [R/W]   W  Halftone-RAM Word 15
$ffff8a20 [R/W]   W  Source X Increment
$ffff8a22 [R/W]   W  Source Y Increment
$ffff8a24 [R/W]   L  Source Address register
$ffff8a28 [R/W]   W  Endmask 1
$ffff8a2a [R/W]   W  Endmask 2
$ffff8a2c [R/W]   W  Endmask 3
$ffff8a2e [R/W]   W  Destination X Increment
$ffff8a30 [R/W]   W  Destination Y Increment
$ffff8a32 [R/W]   L  Destination Address Register
$ffff8a36 [R/W]   W  X Count
$ffff8a38 [R/W]   W  Y Count
$ffff8a3a [R/W]   B  Halftone Operation Register
$ffff8a3b [R/W]   B  Logical Operations Register
$ffff8a3c [R/W]   B  Line Number Register
$ffff8a3d [R/W]   B  SKEW register
$ffff8a3e  $5555   *UNKNOWN*

   ---+++*** ZILOG 85C30 SCC ***+++---
$ffff8c81 [R/W]   B  Channel A Status/Control Register
$ffff8c83 [R/W]   B  Channel A Data Recieve/Transmit Register
$ffff8c85 [R/W]   B  Channel B Status/Control Register
$ffff8c87 [R/W]   B  Channel B Data Recieve/Transmit Register

   ---+++*** Extended Joystick Ports ***+++---
$ffff9200 [R/-]   W  Joystick Fire Button Matrix Register
$ffff9202 [R/W]   W  Joystick Direction Matrix Register
$ffff9210 [R/-]   W  Paddle 0 X Direction
$ffff9212 [R/-]   W  Paddle 0 Y Direction
$ffff9214 [R/-]   W  Paddle 1 X Direction
$ffff9216 [R/-]   W  Paddle 1 Y Direction
$ffff9220 [R/-]   W  Light Gun/Pen X Position
$ffff9222 [R/-]   W  Light Gun/Pen Y Position

   ---+++*** F030 VIDEL Palette Register ***+++---
$ffff9800 [R/W]   L  Falcon030 VIDEL palette register 0
    -              RRRRRR-- GGGGGG-- -------- BBBBBB--
$ffff9bfc [R/W]   L  Falcon030 VIDEL palette register 255

   ---+++*** DSP Host Interface ***+++---
$ffffa200 [R/W]   B  Interrupt Control Register
$ffffa201 [R/W]   B  Command Vector Register
$ffffa202 [R/W]   B  Interrupt Status Register
$ffffa203 [R/W]   B  Interrupt Vector Register
$ffffa204 [R/W]   B  Unused (No, really, it is!)
$ffffa205 [R/W]   B  DSP Word, HI
$ffffa206 [R/W]   B  DSP Word, MI
$ffffa207 [R/W]   B  DSP Word, LO

   ---+++*** MFP MC68901 ***+++---
$fffffa01 [R/W]   B  Parallel Port Data Register
$fffffa03 [R/W]   B  Active Edge Register
$fffffa05 [R/W]   B  Data Direction Register
$fffffa07 [R/W]   B  Interrupt Enable Register A
$fffffa09 [R/W]   B  Interrupt Enable Register B
$fffffa0b [R/W]   B  Interrupt Pending Register A
$fffffa0d [R/W]   B  Interrupt Pending Register B
$fffffa0f [R/W]   B  Interrupt In-Service Register A
$fffffa11 [R/W]   B  Interrupt In-Service Register B
$fffffa13 [R/W]   B  Interrupt Mask A
$fffffa15 [R/W]   B  Interrupt Mask B
$fffffa17 [R/W]   B  Vector Register
$fffffa19 [R/W]   B  Timer A Control Register
$fffffa1b [R/W]   B  Timer B Control Register
$fffffa1d [R/W]   B  Timer C & D Control Register
$fffffa1f [R/W]   B  Timer A Data Register
$fffffa21 [R/W]   B  Timer B Data Register
$fffffa23 [R/W]   B  Timer C Data Register
$fffffa25 [R/W]   B  Timer D Data Register
$fffffa27 [R/W]   B  Sync Character Register
$fffffa29 [R/W]   B  USART Control Register
$fffffa2b [R/W]   B  Reciever Status Register
$fffffa2d [R/W]   B  Transmitter Status REgister
$fffffa2f [R/W]   B  USART Data Register

   ---+++*** Keyboard/Midi ACIAs MC6850 ***+++---
$fffffc00 [R/W]   B  Keyboard ACIA Status/Control Register
$fffffc02 [R/W] B  Keyboard ACIA Data Recieve/Transmit Register
$fffffc04 [R/W]   B  MIDI ACIA Status/Control Register
$fffffc06 [R/W]   B  MIDI ACIA Data Recieve/Transmit Register

$ffffff82  $1c00   *UNKNOWN* (What IS this thing?)
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Re: Undocumented F030 hardware addresses...

Postby mikro » Thu Jul 06, 2017 6:53 am

You were not alone. :) As far as the Videl is concerned, Aura had done exactly the same: http://mikro.atari.org/docs/Memory%20Maps/FALVIDEO.TXT

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Re: Undocumented F030 hardware addresses...

Postby dsp56001 » Sun Jul 16, 2017 11:41 pm

Hello Guys,

According to my documentation here are some infos regarding the MCU from the Falcon 030:

Code: Select all

   ---+++*** Memory Managment Unit ***+++---
$FFFF8003 [R/W]   B  axxx xxxx Refresh Time Constant high byte (video memory)
                                a - Refresh interval control
                                0=default
                                1=counter
$FFFF8005 [R/W]   B  xxxx xxxx Refresh Time Constant low byte

$FFFF8009 [R/W]   B  ssss bbBB Video Memory Configuration Register
                                 ssss - SIMM speed select
                                 bb   - Bank 1 size select
                                 BB   - Bank 2 size select

$FFFF800B [R/W]   B  ssss bbBB Fast Memory Configuration Register
                                 ssss - SIMM speed select
                                 bb   - Bank 1 size select
                                 BB   - Bank 2 size select

$FFFF800D [R/W]   B  axxx xxxx Refresh Time Constant high byte (fast memory)
                                 a - Refresh interval control
                                 0=default
                                 1=counter

$FFFF800F [R/W]   B  xxxx xxxx Refresh Time Constant low byte


Hope this helps :D

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Re: Undocumented F030 hardware addresses...

Postby dhedberg » Mon Jul 17, 2017 11:06 pm

I remember hoping that the Videl had an 8-bit chunky mode which Atari never finished support for in TOS... but so far nobody has found how to enable it. Haha! :lol:
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Re: Undocumented F030 hardware addresses...

Postby Cyprian » Tue Jul 18, 2017 8:10 am

dsp56001 wrote:Hello Guys,

According to my documentation here are some infos regarding the MCU from the Falcon 030:


Hope this helps :D

nice.
where does that list come from?
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Re: Undocumented F030 hardware addresses...

Postby shoggoth » Tue Jul 18, 2017 4:06 pm

dhedberg wrote:I remember hoping that the Videl had an 8-bit chunky mode which Atari never finished support for in TOS... but so far nobody has found how to enable it. Haha! :lol:


The TOS4 VDI has support for 8bpp chunky and 32bpp TC.
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Re: Undocumented F030 hardware addresses...

Postby dhedberg » Tue Jul 18, 2017 4:24 pm

shoggoth wrote:
dhedberg wrote:I remember hoping that the Videl had an 8-bit chunky mode which Atari never finished support for in TOS... but so far nobody has found how to enable it. Haha! :lol:

The TOS4 VDI has support for 8bpp chunky and 32bpp TC.

Ah, I knew it! So we just have to find out how to enable it in hardware! Hehe! ;-)
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Re: Undocumented F030 hardware addresses...

Postby LaurentS » Tue Jul 18, 2017 4:36 pm

> remember hoping that the Videl had an 8-bit chunky mode which Atari never finished support for in TOS... but so far nobody has found how to enable it. Haha! :lol:

Is it serious ? is there really a 8bits chunky mode in the Videl ?
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Re: Undocumented F030 hardware addresses...

Postby dhedberg » Tue Jul 18, 2017 5:11 pm

No. It was just something I dreamed of. Would have been a perfect video mode for the Falcon though. It's too slow for the 16bit Truecolor mode.
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Re: Undocumented F030 hardware addresses...

Postby dsp56001 » Tue Jul 18, 2017 10:43 pm

Cyprian wrote:nice.
where does that list come from?


It came from TECHPUBS.zip (from the Atari_HQ_1.iso CDROM) ---->\TECHPUBS\WP\FALCON\FALCON.txt

Now is the tricky question:

-Can we get (any) more knowledge of the F030 hardware architecture from this document ?
-Are some undocumented registers (really) enabled/active on the F030 ?

Who knows ?
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Re: Undocumented F030 hardware addresses...

Postby czietz » Wed Jul 19, 2017 5:35 am

dsp56001 wrote:It came from TECHPUBS.zip (from the Atari_HQ_1.iso CDROM) ---->\TECHPUBS\WP\FALCON\FALCON.txt


But be aware that the "Falcon" described in that document (68040 CPU, up to 32 MB of expansion RAM, VME bus) was never built. In http://atari-forum.com/viewtopic.php?f=27&t=31106 I came up with some -- unconfirmed -- theories what might have happened.

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Re: Undocumented F030 hardware addresses...

Postby calimero » Wed Jul 19, 2017 6:33 am

dhedberg wrote:No. It was just something I dreamed of. Would have been a perfect video mode for the Falcon though. It's too slow for the 16bit Truecolor mode.

I can imagine how crazy and funky it would look like: Atari ST have 512 color palete and Atari Falcon 8bit (256) chunky mode could display every second color from ST palete on screen (since in chunky mode you do not have palete (CLUT)).
So for 8bit chunky mode there is some support in OS but none in hardware?
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Re: Undocumented F030 hardware addresses...

Postby dhedberg » Wed Jul 19, 2017 7:52 am

8bit chunky would of course make use of a palette.
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Re: Undocumented F030 hardware addresses...

Postby calimero » Wed Jul 19, 2017 10:54 am

dhedberg wrote:8bit chunky would of course make use of a palette.

axa. So it would not be like current 16bit chunk mode on Falcon (without pallet (CLUT))
but rather one byte per pixel that show to pallet index :)

So there is only software side of this? There is no trace of this 8bit chunk mode in current Videl?
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Re: Undocumented F030 hardware addresses...

Postby dsp56001 » Thu Aug 03, 2017 9:49 pm

Greenious wrote:
I will keep going through my older stuff, and if I find the source of my program I'll post it here. Maybe some fun can be had from ST/STE/TT aswell.



Great idea :D

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1st1
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Re: Undocumented F030 hardware addresses...

Postby 1st1 » Tue Aug 15, 2017 11:53 am

I wonder if Falcon has also that gaming mode register discovered by czietz in STE and TT.
Power without the Price. It's not a bug. It's a feature. _/|\_ATARI

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