Modified ST hassles

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Klapauzius
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Re: Modified ST hassles

Postby Klapauzius » Mon Dec 12, 2011 7:16 pm

DarkLord wrote:Sorry to post this here Sean, but I'm asking because you seem to be able to read a bit
of German, whereas I'm lost at it. :)


Hey DarkLord,

if it's not hundreds of pages I could try to help with translation? :)
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Re: Modified ST hassles

Postby DarkLord » Mon Dec 12, 2011 7:40 pm

Klapauzius wrote:
DarkLord wrote:Sorry to post this here Sean, but I'm asking because you seem to be able to read a bit
of German, whereas I'm lost at it. :)


Hey DarkLord,

if it's not hundreds of pages I could try to help with translation? :)


27 page PDF...
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Re: Modified ST hassles

Postby Klapauzius » Mon Dec 12, 2011 7:54 pm

Errrm, I meant to say: If it's not dozens of pages .... :P

Well, if you don't need all of it you could point me to the sections you need?
I happen to have a bit of free time at work these days. :wink:
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Re: Modified ST hassles

Postby DarkLord » Mon Dec 12, 2011 9:33 pm

Klapauzius wrote:Errrm, I meant to say: If it's not dozens of pages .... :P

Well, if you don't need all of it you could point me to the sections you need?
I happen to have a bit of free time at work these days. :wink:


Hahahaha...big difference! :)

But I understand. I have to work the next couple of days, so I can't do much right
now, but I certainly would appreciate any and all help.

http://www.wrsonline.de/pdf/PAK.pdf

is where its located at, if you want to download it. Specifically, what I need to
know is what jumpers need to be set so that a PAK board with TOS v2.06,
not the altered TT 3.06 version, no FRAK board, no Pupla board, and a
68000 chip onboard for compatibility purposes, will boot up and work.

I've got the 32mhz GAL on it, so I don't think I have to worry about that.

I'm fairly sure that an additional wire or 2 has to be run for the compatibility
mode, hopefully the PDF covers that too.

Thanks ever so much! :)

PS AND don't let me catch you taking time away from your Christmas game
conversion project, or I'll report you to Santa! :D
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Re: Modified ST hassles

Postby 1024MAK » Mon Dec 12, 2011 11:35 pm

DarkLord wrote:So I don't have any TT ROMs at the moment, so I'm going with a pair of TOS 2.06 ROMs
that I just happen to have lying around.

Here is a pic, just wanted to make sure I had them in the right place and the right
orientation

Looks okay so far...
DarkLord wrote:So do I need to change any other jumpers on the board to make it go? It was probably
setup for TT ROMs initially I bet. The GAL is a 32mhz one, so I'm thinking that's okay,
won't need the RAM/Buffer board. Funny...the GAL is actually stamped at 32.000000mhz.
I know German precision is legendary but dang! :)

:? I think you mean crystal oscillator clock module (if it is the silver "chip" that you are talking about) :?:
They are fairly accurate, it is common for the maker to stick a load of digits on the crystal.

As the CPU is expecting 32 bit data and you only have 16 bits of data available from the ROM's then something else has to happen or it will just crash the CPU...
Not having one of these tasty items, I cannot help any further :cry:

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Re: Modified ST hassles

Postby DarkLord » Tue Dec 13, 2011 2:29 am

You're probably right about the oscillator. :oops:

Hmm...well, I know it can be done - Toad Computers had it as an option
in their sales listing. You could get the PAK from them with either TOS.
So there has to be a way...

I'd be happy to go all 32 bit OS and put TT ROMs in there, but the version
they mention is always described by them as being modified. Where in
the world would you find a modified set of TT ROMs specifically for the
PAK these days. :(

Thanks for the help!
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Re: Modified ST hassles

Postby ralcool » Thu Dec 15, 2011 5:53 am

http://artur.ataritt030.info/tos.html (the site mentioned in the coding section)

Then viewed under google translate.... at the bottom of the page.

http://translate.google.com/translate?s ... 2Ftos.html

patched TOS 3.06

Version of the system for the accelerator PAK'030.

Handy. maybe.

ST.
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Re: Modified ST hassles

Postby DarkLord » Thu Dec 15, 2011 8:26 am

ralcool wrote:http://artur.ataritt030.info/tos.html (the site mentioned in the coding section)

Then viewed under google translate.... at the bottom of the page.

http://translate.google.com/translate?s ... 2Ftos.html

patched TOS 3.06

Version of the system for the accelerator PAK'030.

Handy. maybe.

ST.


Okay, thanks for the links. Oddly enough, the Polish translations seem just a bit
more clear than the German translations under Google.
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Re: Modified ST hassles

Postby ralcool » Thu Dec 15, 2011 3:52 pm

Sorry for not answering you much specifically about the PAK....

Because I have something I've been messing with the last two days.

Cut a long story short- I've managed to create- HighSpeed ROM access for the overclock mod.

Before (ST running with the usual 16mhz overclock... clean boot)
IMG_3793._16mhz_LSROM_s.jpg


After ST @ 16mhz, with gate modifications for HighSpeed ROM
IMG_3791_16mhz_HSROM_s.jpg


Result 30% faster on display tests from ROM loaded routines.

Simple explanation, the Overclock mod is designed to run the cpu at 16mhz anytime it isn't accessing the bus.
Doing so tends to lockup anything else attached to it still clocked at 8mhz.

I was reading the ADspeed upgrade manual, and it mentions that IF you have -70ns or faster ROMs, you can enabled a high speed ROM access mode.
Quote " ... the ROMs are NOT on the MMU/DMA/ Shifter systems. "

That got me thinking. Correct, they are actually connected directly to the CPU bypassing the MMU. (So is the cartridge port, and IDE actually!)

If they were fast enough, they could send data to the cpu at 16mhz. Hence the -70ns or faster statement.

So, I came up with a plan- slightly modifiy the mod.

Address Strobe is used as one of two signals to downclock the mod. It is pulsed during ROM access- and also fed to the GAL of the MOD.
The GAL also takes care of ROM enable instead of the GLU for TOS2.06 access.

I setup an extra gate chip, to tell the mod to ignore AS disabling it- if the CE lines of the ROMs are in use too. (Obviously the ST wants to talk to them)

So now they can load data into the ST while the cpu is at 16Mhz.

Nows here's the good bit- I had to build the extra gate (XNOR) from 4 NOR gates (From a quad input 74LS02) . This causes a gate delay... A 74HS266 is a native faster XNOR chip,
and on my shopping list.

Also my current ROMs in my ST are 90ns 29F040 4MB chips, and not entirely happy with the high speed.... but juuust stable enough for a clean boot. 70ns was recommened remember.

Things can only get better!

ST. :cheers:

PS, The question is now- can I perform a similar trick during IDE access.... ??? :twisted:
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Re: Modified ST hassles

Postby DarkLord » Thu Dec 15, 2011 4:35 pm

Nice - you've been busy! :)
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Re: Modified ST hassles

Postby wongck » Fri Dec 16, 2011 1:35 am

WOW you get 30% increase in speed.
That's great.
ralcool wrote:Things can only get better!

Looking that it heading that way. :D
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Re: Modified ST hassles

Postby ralcool » Sat Dec 17, 2011 10:02 am

So much to do.

I managed to score some fresh OHP paper today- I'll attempt to knock out a simple IDE/TOS board on my remaining pcb material.
Not a major job- but who knows how my chemicals will treat me today. But this board won't have any current 'new' ideas on it.
Just IDE and TOS 2.06 enable. This is the backbone of future (better?) boards.

Otherwise, I'm working on a very early IDE stage overclock circuit. Almost scared to use it- given it could corrupt everything.
I'm gonna use my spare old 10Gb ex 'xbox' hdd first to see if it the idea can be trusted, and is worth persuing.
If nothing gets lost.... I'll try my faster internal 80Gb drive. (Maybe I'll do fresh image/backup first 8O... I will anyway... :) )

Can we do better than 1.5 - 1.8 MB/sec transfer rates i get already with twisted IDE cabling? ....This could be awesome.

Actually, Although I have NO idea how to do it...but.... Wouldn't it be great to use the high speed cache on modern IDE HDDs for the 'ST' system.
My 'little' 80Gb Hitachi 2.5" 'TravelStar' drive has 8Mb of cache RAM..... double the damn ST memory. And much faster. Connected directly to the CPU.......

I'd program my way to hell if I could to work out how to use it for other uses. (Like TT-RAM...) Its only programming.... but not my game.... I do simple hardware.
Plus I'm not THAT good at it.

Hope to give the results soon.

ST :cheers:
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Re: Modified ST hassles

Postby spiny » Sat Dec 17, 2011 9:55 pm

looking forward to the results :D

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Re: Modified ST hassles

Postby ralcool » Sun Dec 18, 2011 12:42 pm

Update time..... :oops:

This sh!t isn't easy.

Always- something creeps in to test ya.

So, Right now for no apparent reason my rom mounted IDE interface doesn't want to 'see' any partitions..... I didn't even do anything to it.
Just installed some 70ns ROMs and baam nothing works. Put the old roms back in... still nothing. Weird. Somehow it still 'detects' the drive.

I'm doing tests now to work out why. Continuity testing.... maybe I damaged a top link when I removed one of the roms. Dataline failure or something.

Bugger. But the ST still works with TOS2.06, so I continued with some testing. Not in the mood for diagnosing much else... I did swap in another HDD though. No improvement.
It'll be fixed soon I'm sure. Not the first time I've killed it!! :lol: Seriously.

.......

So, I've discovered if I enable the blitter during display tests WITH the high speed rom mod... the ST crashes.
Normally it doesn't (crash) if overclocked. The new addition has created a minor problem. (I've tested this extensively and the crashing is reversable.. remove the addition)

I put this down to the increased delay from the extra gate... The Address strobe signal to the OC mod is delayed around 80ns through 4 extra gate for the additional control circuit.
Plus I'm only using LS type logic chips I have in my parts bin.. not the much faster HC versions. (Hey I have a decent pile of old NOS logic chips to play with)

The overclock isn't being disabled fast enough when the blitter is being requested. (Lucky I have one eh?!)... perhaps other systems are compromised too.
I reckon it will be ok when I try a native HC XNOR chip... Gate delay is less than 20ns apparently.. says the datasheet. Should be interesting to see what happens.

This is prototyping at its best.. new ideas- but also deciding and working out how to implement them.

When I repair my IDE board- or finish the new cpu mounted one.. I can then finish my idea for highspeed IDE access... I hatched a cunning plan.

IORD and IOWR are the IDE signals I'm stealing. Much like the HS rom mode, I plan to use a gate that senses when either of these signals are low- and again
force the overclock to remain on. Curiously, gate delay won't be increased due to the way I've arranged the logic.

I also have a new 8 channel logic probe I need to learn to use- to find out if my signal timings (or those I'm using) are appropriate. Could be hidden speed hiding somewhere.

Time for a beer and reflection. I'm not letting a new or modified mod affect reliablility.

Cheers. :cheers:

ST.
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Re: Modified ST hassles

Postby ralcool » Tue Dec 20, 2011 1:20 pm

Quick post to show a super quick idea.

Based on my otherwise successful ROM mounted IDE board,

I figured... Why does the popsel/Ppera ROM kit insist on seperating the roms into their respective Lo-0/Hi-0 sockets

The only reason you would do that is to mantain ROM2 'select' pins from the GLU. This is redundant since its now controlled by a GAL.

The ROM chip physical location is only determined by the availability of data & Address lines to support it.

So I've refined a board off my own previous design that mearly completes the data/address line needs. D0-15 & A1-A17.

ROM_206.jpg


Now this one is super simple... Single TOS 2.06 (and yes I have a manual 'jumper pin' Quad tos version on CAD too)

The trick is, to use Lo-0 and Hi-2 sockets of an STFM to get all the datalines you need. Those sockets are right beside each other.
And then I can prewire the few links to the IDE/TOS control board to run it.

Already it is wired for flashable TOS ability.

You'll also notice I have placed a third 28pin location.. this is a place holder for a RTC Dallas chip. Once I know soon if it has to be wired to D0-7 or D8-16, I'll finish it.
The control lines are a minor detail easily added next.

I'll attempt to make a Mega ST version if I can figure out the spacings between the sockets. (If the holes seem large- it is to accomodate the new longer pin sockets I've bought)
They also have a thicker shank.

Nice eh?!

Amazing what you think of after midnight and a funny smelling cigarette.

ST. :cheers:
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Re: Modified ST hassles

Postby wongck » Tue Dec 20, 2011 1:49 pm

keep the thinking cap on..... !! :thumbs:
We now have a clock in it :D

Edit: :megaphone: keep your thinking hat on longer.... Frank just dropped a 8MB Fastram mod on the forum 8O :D
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Re: Modified ST hassles

Postby ralcool » Thu Dec 22, 2011 3:12 am

Stuck in faultfinding mode for a while now.

Found the reason why my IDE circuit died- It was a damaged top link (D8 actually).
I wasn't careful enough when I levered out the ROM chip above it.

So, easy- I'll whip it off and solder it up again. Done. Piece of cake.

Reinstall it
Now for some stupid reason the ST won't even boot anymore. Black screen.. Nuffin.
I've been trying everything, tracing out and measuring every signal back to the cpu.

Something isn't connected. But it's hiding well. My worn out sockets don't help either.
56 connections are disturbed by the act of removing/unplugging the IDE board.

I might just have to give in and go about the awful task of removing the motherboard and installing some machined pin sockets.
Totally giving me the shits. Can't do any development work without a working ST.

And just when I've been reading the Assembly Programming guide in the coding section to figure out RTC programming.
The plan was to get the hard drive working and load up Devpac (Which I have used before for the 16mhz switch program) and learn more.
Its sitting there on my h: drive waiting to be used.

Might just give up over Christmas and try again in the new year. Boring......

ST.
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Re: Modified ST hassles

Postby 1024MAK » Thu Dec 22, 2011 3:38 am

Black screen you say.
Check your crystals, and the clock lines.
Both can cause this.

Mark
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Re: Modified ST hassles

Postby ralcool » Mon Dec 26, 2011 12:10 pm

I did check a few signals Mark as a matter of course... but I knew this problem was ROM related.

My ROM mounted TOS/IDE board is annoyingly touchy.

See I built it with machined pin sockets- that when mounted flush to the pcb, enough remaining pin comes through that a second machined pin socket- mounted below
can forcably just engage them. Those sockets then mate to the crappy wiper sockets on the motherboard.

This causes a board that you can barely touch without breaking connections. Hey its only a prototype/Toy. But a year old and reasonably reliable. (Just don't touch it)

I found the damaged dataline to the IDE cable, and another fatigued power 'patch' wire on the pcb after a few hours a day of checking & Finding the motivation.

It is enough to convince the ST to fire up again, and- detect and boot IDE too... but not complete a full normal HDD boot.... something else isn't quite right... I'm nearly there.

HDD reading seems slightly difficult... I can load files from floppy... but only boot half my usual files from IDE. The connections are still not right?..... Maybe some data is corrupted from the dataline failure?.
I got a backup/image of the drive before I screwed with it too much- so I can test this later. (Copying files from the PC backup to floppy show they are okay).. I'll test & fix the Atari system and work it out.

However... This doesn't matter. The ST basically lives (again), and these problems should be solved with the next 'direct to CPU' mounted board. Wicked. We can continue. :twisted:
We also have proper long pin sockets to solve connectivity issues in the future boards.... awesome.

Merry Christmas!

ST. :cheers:

PS, Yes I'm much happier now my Atari is working again. Was a few days there of frustration and concern. Tired old thing testing me!... :lol:

An equal number of days crook as a dog- coughing, sneezing, headaches..all that..... and missing out seeing the in-laws- and infecting anyone in contact recently! Great stuff!
hahaha..... Sorted me some time to attack my ST. ... :roll: ... funny that it's running like me at the moment.. 70% ... but that is a result....okay?!
Rare I get sick... anyway.... um, I hope it still works tomorrow.... :lol:

Plus while on on the extended delay of recieving new pcb material... I'm drafting my first Alt-RAM 8Mb board on CAD... way to go Frank!!!!!
But damn there must be a way to use a GAL instead of half the logic chips there..... So much wiring/tracing! (The multiplexing is fine- but the decoding stage is 'difficult' )
Look its one thing for a basic explaination- but full reverse engineering to understand why it works is another. Its called an 'Operational Description'.
There were three circuit designs on show, and there are some evolutionary changes. I'd love to talk with Frank to learn more.

Then we integrate IDE, keep TOS on the ROM sockets (like I've shown) with some wired control logic, and perhaps then add an FPU or even 8k of cache to the main mod board...... gawd.....
More wiring..... Baby Steps right?!.....Mind you, adding 8k of cache isn't impossible- I'm looking deeply into the Mach16 files to work it out. Keeping cpu speed at 16Mhz is harder.

Another wonderful year of projects!! Sweeet! (Don't worry, I'll finish the simple IDE/TOS cpu mounted board before considering the latest new content of available 'feature creep') Happy days!

There is my report.. I'm off to bed... I figure the new year will find a way to annoy me again. Where is that bottle of red?.....
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Re: Modified ST hassles

Postby ralcool » Tue Dec 27, 2011 6:34 am

Quickly connected my other Atari configured HDD today... the 10Gb EX-Box (See what I did there... :lol:) Drive (Hey, getting that thing to even work on a PC took some work originally)
Those drives are 'locked'... I have a DOS utility somewhere I used to hack it... ahh yes, hdat2. Worked nice for two drives actually.

Everything booted perfectly... So I've done some minor data damage to my lovely internal 2.5" drive.

Ahh well, just have to remove, reformat, repartition and reload crap to it. Maybe just cleaning up the C: will be enough.
I'll try that first. (Why start a big job- if a little one is enough)

Always more to do. (Though I really should change my ROM sockets to much better types... I'm loath to do it....create bigger problems than it fixes)

ST. :cheers:

PS, For those curious types- I've ordered one of those IDE-SATA converters off ebay... just to really know if the ST can use SATA drives. Should......

why? (Not bought yet, and CF is simpler, but hey)

http://www.ebay.com/itm/200564939178?ss ... 1438.l2649
:D
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Re: Modified ST hassles

Postby wongck » Tue Dec 27, 2011 7:39 am

Be careful about those IDE-SATA convertor, sometime the IDE part does not do PIO.
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Re: Modified ST hassles

Postby Shredder11 » Tue Dec 27, 2011 11:10 pm

Little video here for you Sean....

http://www.youtube.com/watch?v=O_fd7t0sNPQ


Stumbled across it while listening to the Roland MT-32 music playback of the Sierra games, that were uploaded by someone from this forum. Weird how you can arrive at seemingly unrelated things!

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Re: Modified ST hassles

Postby wongck » Wed Dec 28, 2011 12:55 am



It included a very short demo of wire wrapping.
:lol: I was doing that for my Uni final year hardware project, using the same type of tool.
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Re: Modified ST hassles

Postby DarkLord » Fri Dec 30, 2011 9:46 am

Thought this might (or might not) help anyone else using Sean's HD floppy
upgrade.

When you replace your stock 720k floppy with the 1.44m version, you have
to modify the opening in your ST's case, whatever model it might be.

After looking at my STacy's opening, I simply dremel'ed out the bottom
corners leaving a small gap in the top, in what would otherwise be a fairly
even rectangle. Well, that gap somehow sticks out and kinda ruins the
looks.

PB220010.JPG


Since I plan on painting the drive block to match the black faceplate
of the drive anyway, I decided to do something about it.

I grabbed this:

PC300001.JPG


and did this:

PC300004.JPG


PC300006.JPG


I let it dry for a couple of hours, then used some 80 sandpaper to blend
it in. I'm going to go over it again with 160 and 320 lightly right before
I actually paint it.

Still, I think its going to look a lot better than just leaving that gap.
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Re: Modified ST hassles

Postby ralcool » Sat Dec 31, 2011 4:48 am

You were bored. :lol: I truely understand. Nice job of it tho. Clearly neater.

....
I reformatted and reload the C: partition of my internal mounted 2.5" 80Gb HDD today.. Everything boots well. (Aftercareful removing and plugging into my USB - IDE 44pin adapter to do it on the PC)

All the mods kick in like usual and Devpac3 is operational again from h:.

On a side note.. somehow I left the ST running last night.. was over 12hrs before I re-entered the room and noticed. Overclocked and Overscanning.
It was running ST-Guide and the Lascan 'hypertext' page open and viewing. (So even the old 10Gb XBOX hdd is reliable?!)

Everything was fine. Screen Saver was alternating the (mono) colours, and the mouse was moving. Nice. (I even have the proper 16Mhz CPU removed ATM... for previous fault finding)

ST. Happy new years eve! :cheers:
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