MiSTer on DE10-Standard - needed?

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Re: MiSTer on DE10-Standard - needed?

Postby Sorgelig » Sun Feb 04, 2018 6:01 pm

ijor wrote:I am just raising the issue because the different pinout at the HPS side, and then the different U-boot configuration, between the DE-10 Standard and the Nano.

at 99.9% i'm sure DE10-standard will boot from my linux without modifications.

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Re: MiSTer on DE10-Standard - needed?

Postby alfishe » Sun Feb 04, 2018 6:24 pm

Sorgelig wrote:at 99.9% i'm sure DE10-standard will boot from my linux without modifications.


Taking bets =))))) Can test it online.
DE1-SoC was not able to boot with current Linux distro (different SoC chip, different DDR)

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Re: MiSTer on DE10-Standard - needed?

Postby alfishe » Sun Feb 04, 2018 6:37 pm

ijor wrote:All Cyclone V SOCs can boot the HPS from this flash, but only the Standard has the connection on the board (although it seems the actual device is not populated). And again, only the Standard have this enabled on U-boot.


U-boot is not an issue - MiSTer already has slightly customized version and we can implement any weird fantasy (if it makes sense of cause).
Pin assignment - ok, different assignment file. Can be solved.

Having all those SoC boards on hands - still found no stimulus to even start porting for any of them.
Reworking Linux code and moving from 100% CPU load and polling model to 3-5% CPU load and async events - I already see improvements.
If it will lead to lowering HPS frequency and power consumption on DE10-nano - we'll it's totally worth and measurable.

But hell, I see no profit to run same code on other 3-4 boards that are more expensive, each adding 1 feature and removing 2 (thanks to perfect Terasic marketing positioning on market =)).

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Re: MiSTer on DE10-Standard - needed?

Postby Sorgelig » Sun Feb 04, 2018 8:40 pm

alfishe wrote:
Sorgelig wrote:at 99.9% i'm sure DE10-standard will boot from my linux without modifications.


Taking bets =))))) Can test it online.
DE1-SoC was not able to boot with current Linux distro (different SoC chip, different DDR)

how about DE10-standard? It should be similar to DE10-nano.

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Re: MiSTer on DE10-Standard - needed?

Postby Sorgelig » Sun Feb 04, 2018 9:49 pm

alfishe wrote:Reworking Linux code and moving from 100% CPU load and polling model to 3-5% CPU load and async events - I already see improvements.

HPS has no power management. If CPU loading is 0% then it simply means it runs 100% empty cycles like while(1){};. CPU has no idle state, no dynamic frequency change, NOTHING. Reducing CPU load may only improve multitasking. But since there is only one main task - MiSTer - there are no benefits of unloading the CPU.

Treat HPS as very fast MCU :)

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Re: MiSTer on DE10-Standard - needed?

Postby Sorgelig » Sun Feb 04, 2018 9:56 pm

I see only one possible way to reduce heating - reduce CPU frequency. Since frequency cannot be changed after boot (at least legally) it means the whole performance of HPS side will drop. In current state of emulation where HPS only serve input/output requests, the total performance probably won't change. If there will be more complex emulation where HPS will emulate some part of system, then reduced HPS speed will affect the emulation performance very much.

Need to explore how FPGA chip will heat on reduced HPS speed. If it will continue to heat but slowly, then the whole effort of reduced speed will be meaningless as it eventually will overheat in closed fan-less case.

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Re: MiSTer on DE10-Standard - needed?

Postby ijor » Mon Feb 05, 2018 12:30 am

alfishe wrote:DE1-SoC was not able to boot with current Linux distro (different SoC chip, different DDR)


Are you sure? That would be unexpected on the DE1-SOC. Different SOC chip, as long as it's Cyclone V, is not relevant. We know that the DE0-SOC that has an even smaller SOC can boot the MiSTer kernel. Different DDR could matter, but I'm pretty sure they use the same chips, even the same speed grade.

Conceivable they could use a different clocking scheme that would require a different PLL setting. I was sure that it was also the same on all these boards. But currently Terasic download site seem to be disabled by their host, so can't verify with the schematics :(

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Re: MiSTer on DE10-Standard - needed?

Postby Sorgelig » Mon Feb 05, 2018 5:06 am

It doesn't boot probably because it tries to load Menu.rbf in u-boot which obviously is not compatible.

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Re: MiSTer on DE10-Standard - needed?

Postby ijor » Mon Feb 05, 2018 9:44 pm

Sorgelig wrote:It doesn't boot probably because it tries to load Menu.rbf in u-boot which obviously is not compatible.


You load that already at u-boot time, before loading the actual kernel? And the boot process stops completely if FPGA config fails for any reason?

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Re: MiSTer on DE10-Standard - needed?

Postby ijor » Fri Feb 09, 2018 1:37 pm

ijor wrote:
Sorgelig wrote:It doesn't boot probably because it tries to load Menu.rbf in u-boot which obviously is not compatible.


You load that already at u-boot time, before loading the actual kernel? And the boot process stops completely if FPGA config fails for any reason?


Bump ...

I can have access to both the DE-10-Standard and the DE-1-SOC and might try to help porting some cores. But would be interesting first to have this kernel issue solved, if it is a kernel issue.

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Re: MiSTer on DE10-Standard - needed?

Postby Sorgelig » Fri Feb 09, 2018 11:48 pm

I don't have those boards, so i cannot test.
Why don't try to test and solve the problems by yourself as you have those boards?

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Re: MiSTer on DE10-Standard - needed?

Postby ijor » Sat Feb 10, 2018 12:00 am

Sorgelig wrote:I don't have those boards, so i cannot test.
Why don't try to test and solve the problems by yourself as you have those boards?


I didn't ask you to perform any test. I just asked you a couple of questions about your kernel build. If you know already that U-boot will fail if the SOC chip is not compatible with menu.rbf then there is nothing to test, at least not before changing that behavior, one way or the other.

So I ask again if you won't mind to answer:

Menu.rbf is loaded at U-boot time, before loading the main kernel?
And the boot process stops completely if FPGA config fails for any reason?

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Re: MiSTer on DE10-Standard - needed?

Postby Sorgelig » Sat Feb 10, 2018 12:04 am

There is another interesting board using the same FPGA chip:
https://www.arrow.com/en/products/chame ... ovtech-inc

The size of board is half of DE10-nano! FPGA chip is exactly the same, although the package uses lower pin count. Unfortunately, manufacturer uses strange config on GPIO - 1.8V which restricts the extensions could be used. Also, it has not so many GPIOs, although after brief look it should be possible to re-program those SPI/I2C signals to use them as GPIO. So, probably it will be possible to gather enough GPIOs for SDRAM daughter board. But all those 1.8V SDRAM chips are mobile targeted and thus all of them are BGA - definitely not for DIY. Don't know if it will be safe to switch FPGA banks to 3.3V - there is BT/WiFi module powered by 1.8V - so i don't know if it will be affected.

Board itself is very attractive ans it very tiny! It could be a mini-Mister if could be possible to add SDRAM.

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Re: MiSTer on DE10-Standard - needed?

Postby Sorgelig » Sat Feb 10, 2018 12:13 am

ijor wrote:I didn't ask you to perform any test. I just asked you a couple of questions about your kernel build. If you know already that U-boot will fail if the SOC chip is not compatible with menu.rbf then there is nothing to test, at least not before changing that behavior, one way or the other.

So I ask again if you won't mind to answer:

Menu.rbf is loaded at U-boot time, before loading the main kernel?
And the boot process stops completely if FPGA config fails for any reason?


If you will afraid to try then you won't be able to do anything. Look at that guy with porting to DE0-nano-SocKit - he just doing everything by himself without requesting info from me.
U-boot boot process is script driven, so the whole booting sequence can be modified from console by changing environment variables.
I don't remember exact behavior of FPGA loading procedure in u-boot, so i don't remember if it will stop or hang on incorrect bitstream. FPGA loading can be skipped by just modifying the environment variables.
Yes, u-boot loads menu.rbf before linux kernel. But not always - it depends on flags checked in the script. If core is loaded from USB blaster, then upon reboot u-boot will skip menu.rbf loading.

Actually, loading menu.rbf before linux is pointless after some API update requiring to read some parameters from INI. So, probably i will change the loading procedure sometime later.

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Re: MiSTer on DE10-Standard - needed?

Postby ijor » Sat Feb 10, 2018 2:06 am

Sorgelig wrote:If you will afraid to try then you won't be able to do anything ... U-boot boot process is script driven, so the whole booting sequence can be modified from console by changing environment variables. ...


Come on Sorgelig, why are you always so unfriendly? Should I spend hours performing some tests and investigating the problem for something that took you less than a minute to answer?

Also, FYI, I don't own those boards, I just can have access to them. So depending on the case, I don't have as much time as I would like to perform tests.

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Re: MiSTer on DE10-Standard - needed?

Postby alfishe » Sat Feb 10, 2018 3:00 am

ijor wrote:Come on Sorgelig, why are you always so unfriendly? Should I spend hours performing some tests and investigating the problem for something that took you less than a minute to answer?


Yes, he has some "specific" personality =)) But as long he produces tons of valuable stuff - who cares? =)
But it also means that any change / step requires army of less productive people to document / test / etc. "C'est la vie"

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Re: MiSTer on DE10-Standard - needed?

Postby alfishe » Sat Feb 10, 2018 3:08 am

ijor wrote:Menu.rbf is loaded at U-boot time, before loading the main kernel?
And the boot process stops completely if FPGA config fails for any reason?


Answering you questions:
- yes, FPGA Menu.rbf stream is loaded via U-Boot script
- I doubt that process stops on my DE10 if menu.rbf is missing or broken. Linux is booting, but I'm not sure if it doesn't trigger null pointer exceptions or something else on other boards in U-Boot code.
More likely Linux kernal hangs on start due to incompatible record in device tree.

Being a follower and "decryptor" of Sorgelig's ideas - always writing comments about what made where, why and how it's related to other parts of MiSTer.
So here you can see such transcript for U-boot script: https://pastebin.com/PnkyLseU
Not the very latest version though.

As a bonus - I'm learning things I've never knew previously fast =)

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Re: MiSTer on DE10-Standard - needed?

Postby Sorgelig » Sat Feb 10, 2018 9:12 am

ijor wrote:
Sorgelig wrote:If you will afraid to try then you won't be able to do anything ... U-boot boot process is script driven, so the whole booting sequence can be modified from console by changing environment variables. ...

Come on Sorgelig, why are you always so unfriendly? Should I spend hours performing some tests and investigating the problem for something that took you less than a minute to answer?

May be because you want to point me how i'm unfrendly with you? You've quoted the part without answers. So you didn't see my answers in the same post? You always like to teach me how to do, where i'm wrong. But you don't want to learn at the same time. You look like much smarter than me according to your posts, so why bother to ask me who according to your posts everything doing wrong way?
I'm not unfriendly. I just have no time for empty conversations. I would rather to spend this time to actually do something for MiSTer. I have no one who can spoon-feed me with info. I have to find it out by myself. Sometimes it takes several minutes, sometimes days. Everything i've done i've put to my repository - so it's already concentrated to MiSTer with a lot of problems solved already. MiSTer follower have something already working. So you start not from ground, but at some floor.
I understand that communication is important thing and i also want to communicate, but i prefer to discuss about something real. If you would already try on DE1/DE10 and found specific problem you don't understand, then welcome to discuss. But you didn't even try, you didn't see the code. So I need to explain you everything in advance and ONLY THEN and MAYBE you will try. It looks like you doing it for me. But I don't need it personally. If i will support DE10-standard by myself, then i will buy this board (but less likely as DE10-standard is not what i like). I need someone really wanting to do it FOR HIMSELF. That's how the hobby is developing.

ijor wrote:Also, FYI, I don't own those boards, I just can have access to them. So depending on the case, I don't have as much time as I would like to perform tests.

I agree to merge DE10-standard specific tweaks to main code, if there will be a dedicated developer who would like to do it for himself at first. In your case it looks like one-time tests which won't lead to adequate supporting for these boards.

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Re: MiSTer on DE10-Standard - needed?

Postby ijor » Sat Feb 10, 2018 8:06 pm

Sorgelig wrote:May be because you want to point me how i'm unfrendly with you? You've quoted the part without answers. So you didn't see my answers in the same post? You always like to teach me how to do, where i'm wrong. But you don't want to learn at the same time. You look like much smarter than me according to your posts, so why bother to ask me who according to your posts everything doing wrong way?


Calm down Sorgelig. Of course that I saw your answer, that's why I said "it took you less than a minute to answer". I didn't quote your actual technical answer simply because it wasn't relevant to what I was replying.

I am not claiming I"m smarter or that I know more than anybody. Sorry, just even the idea of that kind of argument sound rather childish to me.

MiSTer follower have something already working. So you start not from ground, but at some floor.


You did an amazing job. No doubts about it. But, as somebody else just said, you do have a "specific" personality.

It looks like you doing it for me. But I don't need it personally. ... I need someone really wanting to do it FOR HIMSELF ... In your case it looks like one-time tests which won't lead to adequate supporting for these boards.


Of course that I doing this for myself. I think the DE-10 Standard (and the DE1-SOC as well) is a superb board. Yes, much more expensive and perhaps without the "soul and charm" as the Nano. But I don't care about that too much.

And certainly it's not that I can test it only once. But I'm not very familiar with U-boot booting process and to develop that part it would probably require lots of testing. So I was hoping the kernel build for the Nano would work right out of the box on these other boards. Porting the actual cores is less of a problem for me.

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Re: MiSTer on DE10-Standard - needed?

Postby ijor » Sat Feb 10, 2018 8:12 pm

alfishe wrote:Linux is booting, but I'm not sure if it doesn't trigger null pointer exceptions or something else on other boards in U-Boot code.
More likely Linux kernal hangs on start due to incompatible record in device tree.


But what kind of record in the tree could be compatible with one SOC chip but incompatible with the other? The HPS, the actual ARM CPU and its hard controllers should be identical. Or at least it seem so?

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Re: MiSTer on DE10-Standard - needed?

Postby Sorgelig » Sun Feb 11, 2018 12:40 am

ijor wrote:But, as somebody else just said, you do have a "specific" personality.

Everybody has specific personality. I fed up of your ranting already. All future posts about me will be deleted.

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Re: MiSTer on DE10-Standard - needed?

Postby ijor » Mon Feb 12, 2018 12:09 pm

Sorgelig wrote:All future posts about me will be deleted.


Fair enough. But please stop posting about me then. You made much more posts about me, than me about you, and I didn't delete them.

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Re: MiSTer on DE10-Standard - needed?

Postby olin » Thu Feb 22, 2018 7:35 pm

I Like the Chameleon96 board as well.

Maybe one of these new Hyper SRAMS from ISSI could be used - they run on 1.8V and have low pin count (24 pins) while still reasonable speed (166 MHz clock, 36ns access time) and size (16Mbytes). Unfortunately so far they are BGA only, although the pads are spaced by 1mm, which doesn't seem to be too bad. So maybe it might be doable to solder these with a heat gun or using a reflow station in DYI environment. The IC I'm talking about is for example this IS66WVH16M8ALL-166B1LI. I know it would be a huge task to rework existing cores to use these SRAMS. Anyway, it's just an idea. On the other hand some arcade cores don't use SDRAM at all, so it might be interesting to run some cores on this board (it looks HDMI is present on Chameleon96 board, so no IO board should be required I guess)...

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Re: MiSTer on DE10-Standard - needed?

Postby Sorgelig » Thu Feb 22, 2018 8:00 pm

If you mean that so-called SRAM based on SDRAM internally, then you can't use it because you cannot control refresh time. It may happen at any time and will destroy the timings.
All those SDRAM controllers in retro cores are based on deterministic models where refresh is placed into unused time slots.

Probably it's still possible to connect regular SDRAM by switching those I2C/SPI pins into GPIO and use those few GPIOs (6 or 8 - i don't remember) from high-speed connector. There are mobile SDRAM chips using 1.8V. They are all in BGA packages though.

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Re: MiSTer on DE10-Standard - needed?

Postby ijor » Thu Feb 22, 2018 9:01 pm

I don't have personal experience with these HyperRAM, but as I understand they aren't exactly "PSEUDO-SRAM". They behave more like SDRAM with a hidden auto refresh. In this case you do have partial control of the refresh time. As long as you idle the RAM frequently enough, it will refresh automatically when not accessed.

In theory it should be possible to translate refresh requests initiated by the host into idle operations, such that overall RAM timing wouldn't be affected. Can't say without studying the details how much work it would involve.

The main advantage of HyperRam is that it uses a low pin count interface.

Edit typo: should be Pseudo-Sram


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