DE-10 nano temperature issues

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ijor
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Re: DE-10 nano temperature issues

Postby ijor » Wed Nov 08, 2017 11:42 am

Sorgelig wrote:I don't see ANY offer of help. Only complains, complains, complains.


Calm down Sorgelig. Nobody was complaining here. Certainly I wasn't. Not at all. Well, my only complain was about your aggressive attitude.

I just though (and I still think) that it is interesting to comment and exchange ideas about the heating issue. I made some actual temperature measurements comparing with other boards with the same FPGA. And I thought it would be interesting to share my measurements. I thought it is interesting to mention that the board uses an industrial grade part. And I though it was interesting to comment about the different board revisions. I never said, that the heating issue is your fault, and honestly I don't think so.

Bernouilli was saying he was looking at modifying the preloader to use a lower MPU frequency. There was no complain there and I do think it is interesting. It remains to be seen if it is worth. But I think it is an interesting experiment nevertheless.

ijor wrote:Cores should not fail if they meet timing with the slow model. It makes you think that perhaps some cores are not properly constrained.

isn't it a request?


Of course it wasn't. When we followed up I said:

Most, if not all, the other cores probably fit comfortably and they could be constrained properly (assuming they are not already). And I am not complaining to you, that should be implemented by the original developers that are very familiar with the design.


I think I couldn't make it more clear that I wasn't complaining to you nor doing any requests to you. It even wasn't my intention to complain to the original developers either. It was more of a comment that most of the cores in the "clone scene" are not properly constrained.

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Re: DE-10 nano temperature issues

Postby ijor » Wed Nov 08, 2017 11:55 am

Newsdee wrote:I have zero clue in what goes in a constraints file, but I understand it as "cores can be optimized further".


Not exactly. Constraining the design means providing all the data Quartus needs to perform a full and proper timing analysis. If the design is properly constrained Quartus should be able to compile the design in such a way to avoid timing issues even in the worst conditions. And if it can't, it will at least tell you that timing couldn't be met, and will give you lot of detailed information to help you solve the issue.

Sorgelig wrote:I believe only few people are really masters at this task. Usually HDL projects either have no such files (SDC), or just basic one without tweaking.


Sometimes it is just an issue of providing proper constrains. Sometimes there is a design problem that must be redesigned. I was meaning to look at the timing issues of ao486. But being so big and taking so much time to compile, it might help if you could provide the full compilation report files. Otherwise I need to spend hours just to see the report.

I am quite familiar with Quartus timing constrains. But it is very difficult to constrain a (non trivial) design without being familiar both with the original architecture and the design itself. That's why it should better be done by the original developer.

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Re: DE-10 nano temperature issues

Postby Sorgelig » Wed Nov 08, 2017 11:57 am

alexh wrote:AFAIK ARM Linux can use and benefit from the power management available in the Cyclone V. Which version of Linux are you using (I didn't realise MiSTer used Linux at all).

All MiSTer source are available here https://github.com/MiSTer-devel
This is the Linux kernel: https://github.com/MiSTer-devel/Linux-K ... 5.0_MiSTer

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Re: DE-10 nano temperature issues

Postby Sorgelig » Wed Nov 08, 2017 11:59 am

ijor wrote:That's why it should better be done by the original developer.

i'm not an original developer of ao486.

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Re: DE-10 nano temperature issues

Postby Sorgelig » Wed Nov 08, 2017 12:06 pm

ijor wrote:But being so big and taking so much time to compile, it might help if you could provide the full compilation report files. Otherwise I need to spend hours just to see the report.

If it could be so easy to fix the timing problems by just looking at report files..
I've spent several weeks to port this core. Why? May be because i really wanted to make it work on MiSTer. If i want something, then i can spend a lot of time just to make it happen.. of course if it only depend on my willing.
So, if you really want to fix the core, then don't afraid to spend your time. It won't happen without effort.

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Re: DE-10 nano temperature issues

Postby ijor » Wed Nov 08, 2017 12:26 pm

Sorgelig wrote:i'm not an original developer of ao486.


I know. Again, I wasn't complaining to you. Actually I wasn't exactly complaining at all, not even to the original developer.

If it could be so easy to fix the timing problems by just looking at report files ...


I didn't say that, not nearly, did I ??? But it would certainly help.

I've spent several weeks to port this core. Why? May be because i really wanted to make it work on MiSTer. If i want something, then i can spend a lot of time just to make it happen.. of course if it only depend on my willing.
So, if you really want to fix the core, then don't afraid to spend your time. It won't happen without effort.


Of course that it requires an effort. But I don't see the reason to spend unnecessary hours when I could start looking at the reports right away. Yes, that would only be a start.

But if you don't want to provide the compilation report files, then don't.

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Re: DE-10 nano temperature issues

Postby Sorgelig » Wed Nov 08, 2017 1:57 pm

ijor wrote:But if you don't want to provide the compilation report files, then don't.

i don't keep report files for all my cores. Especially if i'm not actively working on particular core.

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Re: DE-10 nano temperature issues

Postby alexh » Wed Nov 08, 2017 2:57 pm

I will look to install the tools and setup a JENKINS server to rebuild every core whenever GIT is updated. No promises on a timescale but it will be an interesting learning curve.

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Re: DE-10 nano temperature issues

Postby Newsdee » Wed Nov 08, 2017 4:09 pm

alexh wrote:I will look to install the tools and setup a JENKINS server to rebuild every core whenever GIT is updated. No promises on a timescale but it will be an interesting learning curve.

Would it be possible to have it copy all the rbfs into a folder? That could automate an SD card folder ready for download that automatically updates, it would be useful for all :)

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Re: DE-10 nano temperature issues

Postby ijor » Tue Nov 14, 2017 7:18 pm

Sorgelig wrote:Some cores like ao486 impossible to tweak to make it work reliably with any temperature of FPGA. Core is too big and even without much constrains took more than hour to compile.


I tried compiling this core, and at the end it seems it is actually the other way around. The reason that the ao486 cores takes so much time to compile, the reason that it takes so much routing resources and sometimes even fails to compile, seems to be precisely because it is not fully constrained and has some severe timing issues.

It already seemed to me very strange when you said that compilation fails at the router. FPGA's are actually designed with spare routing resources (because it is cheap), so that this would normally not happen. If a design fails to fit in the device, it should fail at placement time because it needs more logic resources (LEs, memory, etc). That's one of the reason that I wanted to see the compilation report. To understand better the problem.

I'll elaborate and follow up later, better in a separate thread.

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Re: DE-10 nano temperature issues

Postby Sorgelig » Tue Nov 14, 2017 10:28 pm

ijor wrote:It already seemed to me very strange when you said that compilation fails at the router.

yes. it fails at the router. Placement doesn't take much time. only small fraction of the whole time. Router takes >90% of the whole compilation times.

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Re: DE-10 nano temperature issues

Postby ijor » Wed Nov 15, 2017 4:21 am

Sorgelig wrote:yes. it fails at the router. Placement doesn't take much time. only small fraction of the whole time. Router takes >90% of the whole compilation times.


I know. I "experienced" that myself when trying to compile. I created a specific thread for the issue:

viewtopic.php?f=117&t=32622


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