MiSTer: MiST on Terasic DE10-nano board.

https://github.com/MiSTer-devel/Main_MiSTer/wiki

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Sorgelig
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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby Sorgelig » Wed Oct 11, 2017 9:53 pm

If joystick is not defined for specific core, then definition from Menu core will be used.

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby TorsteinP » Sun Oct 15, 2017 8:54 am

My setup using Zero4U USB hub. Got PCB for I/O board 5.2. Just waiting for components from DigiKey. Also found a micro USB to mini USB cable adapter on eBay I'm waiting for.
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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby jcw » Mon Oct 16, 2017 8:23 pm

Even though the latency will be "bursty", I'd like to explore the DDR3 bridging to HPS. Is there an example of how this is done? I can see the signals in the "emu" verilog module, so all the good stuff seems to be in place already - but I haven't found examples of its use on GitHub. Does this map straight to all the HPS's 1 GB memory? Do I need to reserve a range on the Linux side to be allowed to use it on the FPGA side? Is it 64-bit wide, even though the DE10-NANO h/w has 32-bit wide memory?

I'm still reading up quite a bit on all this... (and with apologies if this is the wrong thread to post in)

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby Sorgelig » Tue Oct 17, 2017 12:11 am

Check the FPGAGen core. It uses simple DDR3 access. More complex usage of DDR3 you can see in ao486 core.

DDR3 data is transferred on both edges of clock, so with 32bit bus it provides 64bit data on every clock cycle. Actually, bit-ness on MPFE bus has no relation to physical bit-ness of memory. Memory works on 800MHz while SDRAM bridge (MPFE) runs at around 100MHz, thus it may provide up to 256bit without slowing down the memory access.

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby jcw » Tue Oct 17, 2017 1:34 am

Thanks!

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby jcw » Fri Nov 10, 2017 12:02 pm

I've started collecting some info about MiSTer cores, for lack of an easy reference as to what resources each one needs:

mister-rsrc.png

See https://gist.github.com/jcw/e5f08c7f249689b30afc8fbf5220cb02 for the latest version of this table. If you post a comment with proper values for other entries, I'll add it in.
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Sorgelig
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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby Sorgelig » Fri Nov 10, 2017 12:23 pm

jcw wrote:I've started collecting some info about MiSTer cores, for lack of an easy reference as to what resources each one needs:

For end-user, the only important things are SDRAM and Secondary SD card requirements as it depends on extension boards they need - this information is available on Wiki.
How many on-board resources occupied by the core - it doesn't matter as long as it fits.
May be what FPGA resources occupied by non-ported core could be useful for plans on porting. Otherwise i don't see a reason of this table.

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby Slade » Tue Nov 14, 2017 8:07 am

I didn't see the point of starting a new thread to see if this might be possible.

I was wondering, if there are other cores @sorgelig would be willing to port ? I realise some of these may not be possible, or interesting, but I thought if you don't ask, you may never know.

CoCo3 (or TRS-80 III) in VHDL. Who doesn't want to see the trash80 available ?!: https://github.com/richard42/CoCo3FPGA

Gameboy. Seems to be a combination of C++ and VHDL: https://code.google.com/archive/p/gbfpg ... ult/source

Temlib. Which allows simulation of a Sun Sparc Workstation, amongst other things: http://temlib.org/site/

Vic20. Hey, we have other Commodore cores, why not the Vic 20 as well ?

http://svn.fpgaarcade.com/viewvc/Replay ... 20/source/
User: SVNguest
Pass: s1fUXdnc3a

I'm not expecting anything, just hoping if source is available that porting may well be possible. Thanks for reading.

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby Sorgelig » Tue Nov 14, 2017 9:57 am

Slade wrote:I didn't see the point of starting a new thread to see if this might be possible.

I was wondering, if there are other cores @sorgelig would be willing to port ? I realise some of these may not be possible, or interesting, but I thought if you don't ask, you may never know.

CoCo3 (or TRS-80 III) in VHDL. Who doesn't want to see the trash80 available ?!: https://github.com/richard42/CoCo3FPGA

Gameboy. Seems to be a combination of C++ and VHDL: https://code.google.com/archive/p/gbfpg ... ult/source

Temlib. Which allows simulation of a Sun Sparc Workstation, amongst other things: http://temlib.org/site/

Vic20. Hey, we have other Commodore cores, why not the Vic 20 as well ?

http://svn.fpgaarcade.com/viewvc/Replay ... 20/source/
User: SVNguest
Pass: s1fUXdnc3a

I'm not expecting anything, just hoping if source is available that porting may well be possible. Thanks for reading.


I've saw all these cores.
I don't remember why i didn't port VIC20. Actually it's not so attractive to me comparing to C64 which is actually covers all VIC20 features. I don't know any VIC20 specific game which will force me to port the VIC20.
But in general, i agree, it's better to port it. May be later.

CoCo3 core is hypertrophic fantasy computer. It's no more CoCo3. It runs on very high speed and requires a lot of high-speed memory (SSRAM - used on high-end Stratix boards if i remember correct). I'm VERY VERY against any fantasy computers as they bring no any meaning in present days. While running on 25MHz is looks pretty fast CoCo3, it's nothing comparing to Intel Core i9. So there is no reason to make such strange cores.
Give me the source of core implementing CoCo3 with its real specifications - and i promise to port it.
Of course it's only my opinion. Anyone else can try to port any fantasy computer to MiSTer. More cores - is better.

Gameboy sources i've saw claimed to be a very early prototype which almost doesn't work. May be readme is old..

Temlib - if i remember right, it's very limited and close to proof-of-concept than something really useful. They didn't implement graphics accelerator and other HW which is crucial for normal work. Core is pretty large, and i don't want to spend a lot of time for something which is close to POC. But again, anyone else is welcome to port it.

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby Gehstock » Tue Nov 14, 2017 11:22 am

We have a Gameboy on Mist https://github.com/mist-devel/mist-boar ... es/gameboy and i send you the Sources for Gameboy Color
Not only my Cores for MIST/MISTer : https://github.com/Gehstock

Sorgelig
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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby Sorgelig » Tue Nov 14, 2017 12:51 pm

Gehstock wrote:We have a Gameboy on Mist https://github.com/mist-devel/mist-boar ... es/gameboy and i send you the Sources for Gameboy Color

That's good!
I will port it then.

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby Slade » Wed Nov 15, 2017 8:23 am

I "found" the source for the Acorn Atom on the zxuno forum. Code on Github: https://github.com/hoglet67/AtomFpga
Original thread: http://www.zxuno.com/forum/viewtopic.php?f=16&t=1238

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby alfishe » Sun Nov 19, 2017 2:39 am

Woo hoo - an article about MiSTer on Hackaday =) https://hackaday.com/2017/11/18/mister- ... creations/

Sorgelig
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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby Sorgelig » Sun Nov 19, 2017 4:42 pm

and about 5K bits of block RAM

lol.. should be 5.5Mbits of block RAM.

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Re: MiSTer: MiST on Terasic DE10-nano board.

Postby Newsdee » Mon Nov 20, 2017 11:48 pm

Not worth a new thread, but I find that the ability to use subfolders for core selection is really nice! Great addition, Sorgelig!


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