Possible features on cores? Pause and Savestates

https://github.com/mist-devel/mist-board/wiki

Moderators: Mug UK, Zorro 2, Greenious, spiny, Moderator Team

RobeInie
Atari User
Atari User
Posts: 32
Joined: Thu Mar 16, 2017 11:11 pm

Possible features on cores? Pause and Savestates

Postby RobeInie » Sun Sep 22, 2019 9:10 am

Hi !

I was thinking in the possibility of adding pause option (on a keyboard key or OSD) and "freeze" the implementation. You know... for example ,you are playing and the phone rings... :-)
If I am not in a mistake, it would be easy and a good option,
(and a lot of machines can be modded in they real version (for example, I have a modded Atari 2600 with pause button)).

Another thing that would be useful is Savestates (like the emulators do). But perhaps it is more difficult to implement, (but... it is possible?).
One way in the Spectrum core is using the old with DivMMC (as the DIVMMC allows to make snapshots). In the amstrad wiki, Renaud Helias talks about the possibility of doing it on his core.

Making an option of save/load state on cores It is something possible? Or only a dream?

If a pause option and save states can be added, then the cores will have two very interesting options of the emulators... but without emulation :-)
Perhaps, a way for doing this is generate snapshots and then load them (but I am not a developer...)

PD (EDIT):
I have found some interesting posts in the forum (sorry, don't search before...)
I am reading about savestates, and looks like very difficult to implement, and no sense at this moment , for example:
viewtopic.php?t=34816
I understand all of the post information, and that the FPGA implementation and the developers have other priorities at this moment, so I will forgot the possibility of savestates on FPGA :)
Last edited by RobeInie on Sun Sep 22, 2019 10:53 pm, edited 1 time in total.

RobeInie
Atari User
Atari User
Posts: 32
Joined: Thu Mar 16, 2017 11:11 pm

Re: Possible features on cores? Pause and Savestates

Postby RobeInie » Sun Sep 22, 2019 10:52 pm

PD (EDIT): I have found some interesting posts in the forum (sorry, don't search before...)
I am reading about savestates, and looks like very difficult to implement, and no sense at this moment , for example:
viewtopic.php?t=34816
I understand all of the post information, and that the FPGA implementation and the developers have other priorities at this moment, so I will forgot the possibility of savestates on FPGA


Return to “MiST”

Who is online

Users browsing this forum: No registered users and 6 guests