Search found 2335 matches

by ijor
Sun Dec 17, 2017 12:40 pm
Forum: MiSTer
Topic: MISTer on DE0-nano-SoCKit?
Replies: 63
Views: 2261

Re: MISTer on DE0-nano?

Sorgelig wrote:Yeah. Go measure it. Just let me find the best sit to watch ;)


You need high end instruments. I don't have the right equipment. Then just perform timing analysis, and of course, validate it with some testing.
by ijor
Sun Dec 17, 2017 12:23 pm
Forum: MiSTer
Topic: MISTer on DE0-nano-SoCKit?
Replies: 63
Views: 2261

Re: MISTer on DE0-nano?

Shift the phase is the easiest thing to do. But first, you need to finish the HW design. At least you need to fix the pin assignment. Shift amount should be done on max supposed to be supported frequency. For example on 167MHz. Lower frequencies will use the same phase shift. Just shift it a little...
by ijor
Sun Dec 17, 2017 2:10 am
Forum: MiSTer
Topic: MISTer on DE0-nano-SoCKit?
Replies: 63
Views: 2261

Re: MISTer on DE0-nano?

I was under impression that PLL shift and other related changes would require modification of sys/pll.qip and pll.v. If not then great, if yes then I don't have enough knowledge about Quartus to judge how easy/hard is to make such changes dependent upon selected 'Revision', and whether the changes ...
by ijor
Sat Dec 16, 2017 3:35 pm
Forum: MiSTer
Topic: SDRAM board
Replies: 66
Views: 2939

Re: SDRAM board

I've did an experiment when the whole FPGA bank switched to 2.5V instead of 3.3V and with Alliance SDRAM chip it gave few additional MHz of frequency ... Interesting, but I wasn't talking exactly about the voltage levels. The FPGA supports programmable slew rate and output current strength that can...
by ijor
Sat Dec 16, 2017 12:55 pm
Forum: MiSTer
Topic: MISTer on DE0-nano-SoCKit?
Replies: 63
Views: 2261

Re: MISTer on DE0-nano?

I'm afraid deviating from the DE10 design would make it less simple to port cores, therefore it would detract interest. I don't think it will make porting cores less simple. Why you think it will? What you loose is the possibility of using DE-10 DRAM boards. That's why I am saying that it depends o...
by ijor
Sat Dec 16, 2017 12:31 am
Forum: MiSTer
Topic: SDRAM board
Replies: 66
Views: 2939

Re: SDRAM board

Did you add a 4.7K pull-down to the CKE line in that design? ... To prevent overshoot, and increase the speed of the line going low Are you sure you mean CKE and not something else? Relly it doesn't make much sense on this signal since, as Sorgelig is saying, it is pretty much static. Note that ove...
by ijor
Sat Dec 16, 2017 12:28 am
Forum: Coding
Topic: ST Chipset decap
Replies: 98
Views: 18970

Re: ST Chipset decap

Thx. Still some trouble reading schematics. I suppose the rightmost gate is a (N)OR and the 3 left of it are (N)ANDs? They are all NANDs, no NOR here. The inversions are probably confusing you. But logically it does behave like 3 ANDs and an OR. The World is my Oyster screen #2 uses '3' to remove t...
by ijor
Fri Dec 15, 2017 12:46 am
Forum: Steem
Topic: STEEM SSE Blitter bug
Replies: 18
Views: 589

Re: STEEM SSE Blitter bug

Ijor, do you realize how your quoting is inappropriate ? That's your very personal opinion that is was inappropriate. I don't think it was. I quoted what I believed it was necessary. I didn't have any intention at all to remark your wrong and and ignore you right. As a matter of fact, I think it wa...
by ijor
Thu Dec 14, 2017 9:43 pm
Forum: Steem
Topic: STEEM SSE Blitter bug
Replies: 18
Views: 589

Re: STEEM SSE Blitter bug

MOVE CCR,D0 is illegal on the MC68000, or at least I think so. I would say that it is not illegal from top of my head. So, that TOS1.62SE is strange, but maybe not - that could be just CPU test - Move from CCR is not a valid 68000 instruction. It was added on the 68010 for the purpose of supporting...
by ijor
Thu Dec 14, 2017 9:27 pm
Forum: MiSTer
Topic: Testing: Support for more HDMI resolutions and other changes.
Replies: 22
Views: 484

Re: Testing: Support for more HDMI resolutions and other changes.

Weird.. My monitor shows different resolutions.. This can't be the monitor. A monitor might not support a given resolution. But then you won't get any display at all, or some kind of message in the best case. If the monitor displays the core output at a given resolution it means that's the resoluti...
by ijor
Thu Dec 14, 2017 2:35 am
Forum: MiSTer
Topic: MISTer on DE0-nano-SoCKit?
Replies: 63
Views: 2261

Re: MISTer on DE0-nano?

I use passive heat sink on the the SoC and now added a small copper heat sink on Winbond (w9825g6jh-6) SDRAM - which helped. So it seems heat is a major issue. You might need a fan, and not just a passive heat sink. If that means changing the SDRAM board layout and breaking compatibility with Sorge...
by ijor
Thu Dec 14, 2017 2:18 am
Forum: 680x0
Topic: 68000 weird out of order reads?
Replies: 9
Views: 373

Re: 68000 weird out of order reads?

Here's the YACHT table for CMPI: ... According to it, the operand is read before prefetch. The operand is read before prefetching the second word of the next instruction, but after the first word with the actual opcode (remember each instruction starts with two words on the prefetch queue). That wa...
by ijor
Wed Dec 13, 2017 6:07 pm
Forum: News & Announcements
Topic: EmuTOS 0.9.9
Replies: 116
Views: 2817

Re: EmuTOS 0.9.9

The Atari Compendium is not an official Atari documentation, is it? It most certainly was official documentation. It was produced in cooperation with Atari I believe. Of course it wasn't an official documentation. Where do you see anything that remotely indicates that? Do you see any kind of Atari ...
by ijor
Wed Dec 13, 2017 5:16 pm
Forum: News & Announcements
Topic: EmuTOS 0.9.9
Replies: 116
Views: 2817

Re: EmuTOS 0.9.9

A brief look at the atari compendium. The sources to TOS are on the net somewhere. It might be worth digging through them. The Atari Compendium is not an official Atari documentation, is it? Sources, unless officially published at the time are certainly not any kind of documentation at all. And any...
by ijor
Wed Dec 13, 2017 4:35 pm
Forum: News & Announcements
Topic: EmuTOS 0.9.9
Replies: 116
Views: 2817

Re: EmuTOS 0.9.9

If a function is marked (void) you can't expect a sane return code. Where do you see it is marked as void? I would claim it is not. We are talking about the 192K version, at least the OP is talking about that version. AFAIK, the only official documentation for those versions of TOS is in " Hit...
by ijor
Wed Dec 13, 2017 4:15 pm
Forum: MiSTer
Topic: MISTer on DE0-nano-SoCKit?
Replies: 63
Views: 2261

Re: MISTer on DE0-nano?

I checked the schematics. The DE0 does have PLL dedicated output pins at GPIO pins GPIO_0_D14 and GPIO_0_D15. If you decide to explore that option and need help adjusting the PLL, let me know.
by ijor
Wed Dec 13, 2017 2:56 pm
Forum: MiSTer
Topic: MISTer on DE0-nano-SoCKit?
Replies: 63
Views: 2261

Re: MISTer on DE0-nano?

Yesterday I built 2 SDRAM boards, none of them was working. Both were using the 16MByte ISSI chips marked with speed 7 (144 MHz). The first one was soldered by hand, second one via reflow on my inverted cloth iron (checked the temperature was 220°C via thermocouple). I tested those SDRAM boards on ...
by ijor
Wed Dec 13, 2017 1:20 pm
Forum: 680x0
Topic: 68000 weird out of order reads?
Replies: 9
Views: 373

Re: 68000 weird out of order reads?

Thanks for the replies guys. Does anyone know of any documentation regarding this? A doc showing how the 68000 instructions are broken down into microcode would be awesome too. The closer to an official documentation is US patent: 4,325,121 Be warned that the scans are barely readable, it has some ...
by ijor
Wed Dec 13, 2017 4:08 am
Forum: 680x0
Topic: 68000 weird out of order reads?
Replies: 9
Views: 373

Re: 68000 weird out of order reads?

It has to do with how the microcode works. There are many cases like this. I would need to double check it to be sure. But IIRC, in this case the (apparent) reason is that the CPU needs an extra cycle to process the operand address before actually reading. This again has to do with how the microcode...
by ijor
Wed Dec 13, 2017 3:49 am
Forum: News & Announcements
Topic: EmuTOS 0.9.9
Replies: 116
Views: 2817

Re: EmuTOS 0.9.9

Pera/AtariZoll is, as usual, extremely unfriendly and aggressive, speaking like he is is always right and everybody else is always wrong ... But in this case, I'm not sure he is THAT wrong. I think that emulating even undocumented behavior is not bad, unless of course there is a good reason not to. ...
by ijor
Sun Dec 10, 2017 1:23 pm
Forum: MiSTer
Topic: SDRAM board
Replies: 66
Views: 2939

Re: SDRAM board

It might be possible to use the CKE pin.
by ijor
Sun Dec 10, 2017 1:19 pm
Forum: Hardware
Topic: MEGAFILE 60 disk capacity issue
Replies: 6
Views: 284

Re: MEGAFILE 60 disk capacity issue

I don't think that "RLL uses the same density as MFM." is good formulation. Even if flux density (or whatever is proper term) on surface might be same, structure is different. Encoding is of course different by definition. So what? What matters here is the transition density/frequency at ...
by ijor
Sun Dec 10, 2017 2:11 am
Forum: Hardware
Topic: MEGAFILE 60 disk capacity issue
Replies: 6
Views: 284

Re: MEGAFILE 60 disk capacity issue

Most MFM drives can work with RLL without problems. RLL uses the same density as MFM. Those MFM drives were manufactured before RLL controllers reached the market. They just weren't factory tested with RLL.
by ijor
Sun Dec 10, 2017 2:05 am
Forum: MiSTer
Topic: SDRAM board
Replies: 66
Views: 2939

Re: SDRAM board

SRAM could be a nice addition. If going to high speed SRAM, personally, I prefer synchronous and not asynchronous. It should be possible to use a single board sharing the buses and just use separate chip select signals. Even if they won't be used both by the same core, it is still more convenient th...
by ijor
Sun Dec 10, 2017 1:59 am
Forum: MiSTer
Topic: MISTer on DE0-nano-SoCKit?
Replies: 63
Views: 2261

Re: MISTer on DE0-nano?

Perhaps more important than changing the constrains is to adjust the PLL clock shift. The ideal shift depends on several factors. You might also try using a dedicated clock output pin if it reaches a reasonable location on the GPIO connector. The AS4C16M16SA-6TCN is certainly outstanding. You need a...

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