Search found 2560 matches

by ijor
Wed Aug 15, 2018 1:26 am
Forum: Coding
Topic: SHIFTER reimplementation on FPGA
Replies: 78
Views: 6461

Re: SHIFTER reimplementation on FPGA

... the 16MHz clock is buffered at the socket with an MC74VHC1GT125. I wonder if this is really needed. Did you happen to test without it? I'm not suggesting to not use a level shifter and it certainly improves the noise margin, but just curious because TTL compatible output levels probably work.
by ijor
Tue Aug 14, 2018 7:34 pm
Forum: Coding
Topic: SHIFTER reimplementation on FPGA
Replies: 78
Views: 6461

Re: SHIFTER reimplementation on FPGA

So to make a stand-alone shifter with the Altera parts I can access in this old version of Quartus, I guess it would basically need all the same hardware as the HDMI board: 16 pins of bidirectional level shifters, 9 pins of downward level shifters and 10 upward level shifter for the clock and RGB (...
by ijor
Tue Aug 14, 2018 7:30 pm
Forum: Coding
Topic: Different SHIFTER versions
Replies: 64
Views: 3611

Re: Different SHIFTER versions

tin wrote:Here's the previous IMP set in 8ns and with dl3, dl6 and two different lowrez "shiftedleft" cases added.


Thanks once more again. But seems to me again that some of the traces might have the wrong resolution.

This looks like low rez, and not med rez: C070713-002IMP_med_50hz_dl3.vcd
by ijor
Mon Aug 13, 2018 1:09 pm
Forum: Coding
Topic: Different SHIFTER versions
Replies: 64
Views: 3611

Re: Different SHIFTER versions

tin wrote:Regarding „banded“ and „shifted“ ...


I suspected something like that. But the trace bandwidth (50 MHz) is a bit too low and then it's difficult to analyze unless you know beforehand what you are looking for.
by ijor
Mon Aug 13, 2018 4:13 am
Forum: Coding
Topic: Different SHIFTER versions
Replies: 64
Views: 3611

Re: Different SHIFTER versions

Hi,

The 3 "normal" low rez traces are now ok. So it sounds indeed that there was some kind of mix up with the previous one on low rez.

I didn't check the other two, banded and shifted. Not sure what you mean by this effect?

Thanks once more again :)
by ijor
Fri Aug 10, 2018 1:46 pm
Forum: HxC Floppy Emulator
Topic: HxC External floppy cable, works as A and B
Replies: 40
Views: 16267

Re: HxC External floppy cable, works as A and B

But I think that is likely to be easier/safer than either desoldering the whole AY8912 or trying snip some pins and connect wires to each end you snipped? :wink: Of course. Something like that is needed when the straps are not present at all. It is also needed on pre STE computers when you want an ...
by ijor
Fri Aug 10, 2018 1:05 pm
Forum: Hardware
Topic: STe - Bad DMA Chip
Replies: 114
Views: 24114

Re: STe - Bad DMA Chip

I don't want to rock the boat, but what happens when you combine a 'Good' DMA IC with a 'Good' CMOS CPU? Anyone tried that? Probably somebody tried, possibly without knowing, an probably is not a problem. It is almost obvious to me that the the DMA problem is caused by a combination of factors. You...
by ijor
Fri Aug 10, 2018 12:56 pm
Forum: HxC Floppy Emulator
Topic: HxC External floppy cable, works as A and B
Replies: 40
Views: 16267

Re: HxC External floppy cable, works as A and B

On most STf and all STe there are jumpers on board to route the DS0 and DS1 signals to appropriate pins of external FDD connector. You mas use them, together with a DSx jumpers on the internal FDD. Yes, but I understand those jumpers are never populated. So you still need some minimum soldering and...
by ijor
Fri Aug 10, 2018 12:49 pm
Forum: Coding
Topic: SHIFTER reimplementation on FPGA
Replies: 78
Views: 6461

Re: SHIFTER reimplementation on FPGA

Hmm, I see. I'll leave that problem for later since it seems quite intractable. It is difficult to workaround the reset skew. But you can still align the pixel clock using a regular LOAD edge. Not as straightforward as using reset though. You obviously can't do it on every LOAD pulse. You must do i...
by ijor
Fri Aug 10, 2018 4:19 am
Forum: Coding
Topic: SHIFTER reimplementation on FPGA
Replies: 78
Views: 6461

Re: SHIFTER reimplementation on FPGA

If the chipset reset skew is related to the MMU/GLUE, then won't it just be another symptom of the wakeup states we already have to compensate for? If I understand exactly what you mean, then no. There is no relation whatsoever between the wakestates (of any type) and the mentioned reset skew. The ...
by ijor
Thu Aug 09, 2018 1:03 pm
Forum: For sale / Wanted
Topic: [For sale] SatanDisk V4 Compact
Replies: 12
Views: 1033

Re: [For sale] SatanDisk V4 Compact

Thanks kodak80
by ijor
Thu Aug 09, 2018 11:07 am
Forum: Coding
Topic: SHIFTER reimplementation on FPGA
Replies: 78
Views: 6461

Re: SHIFTER reimplementation on FPGA

// Generate 16MHz and 8MHz pixel clocks from 32MHz clock always @(posedge CLOCK_32) begin if (reset) begin speed_divider <= 0; end else begin speed_divider <= speed_divider + 2'b1; end end This can certainly produce wakestate effects. You can confirm this by applying reset when you see the pixel co...
by ijor
Wed Aug 08, 2018 5:13 pm
Forum: For sale / Wanted
Topic: [For sale] SatanDisk V4 Compact
Replies: 12
Views: 1033

Re: [For sale] SatanDisk V4 Compact

Anybody knows has to contact Edu/Aranet? I don't see any contact at his website, and he hasn't visited the forum for some weeks.
by ijor
Wed Aug 08, 2018 2:45 pm
Forum: Coding
Topic: SHIFTER reimplementation on FPGA
Replies: 78
Views: 6461

Re: SHIFTER reimplementation on FPGA

That should be OK, because while RESET is asserted the clock counter will be cleared - so the low-res pixel clock will become aligned with the RESET signal, which I'm assuming has a fixed relationship to the 8MHz clock (that's an assumption I'm making that may be wrong...). Hmm, it is complicated. ...
by ijor
Wed Aug 08, 2018 4:04 am
Forum: Coding
Topic: SHIFTER reimplementation on FPGA
Replies: 78
Views: 6461

Re: SHIFTER reimplementation on FPGA

I have no way of seeing which wake-up state the machine is in when using a real shifter which makes it hard to test. You can measure the wakeup with a Logic Analyzer as I described in the other thread. It is also possible to "visualize" (more or less) the wakeup with a screen that mixes l...
by ijor
Wed Aug 08, 2018 3:25 am
Forum: Coding
Topic: SHIFTER reimplementation on FPGA
Replies: 78
Views: 6461

Re: SHIFTER reimplementation on FPGA

I mean a test of the FPGA model shifter to confirm that the palette writes are synchronised to the pixel that they're intended to affect. I have seen some corruption also in 50Hz mode, I assume it's wakeup state related. I haven't confirmed whether the same corruption happens on a physical shifter,...
by ijor
Wed Aug 08, 2018 3:09 am
Forum: Coding
Topic: SHIFTER reimplementation on FPGA
Replies: 78
Views: 6461

Re: SHIFTER reimplementation on FPGA

MAX V 5M1270Z and 5M2210Z are 5V tolerant :... Interesting, I didn't know. But note that they aren't really 5V tolerant, they are PCI compliant, which is not exactly the same thing. Among other things, they still need some minimal external logic for operating at 5V. And one I/O bank only, out of fo...
by ijor
Tue Aug 07, 2018 9:45 pm
Forum: Coding
Topic: SHIFTER reimplementation on FPGA
Replies: 78
Views: 6461

Re: SHIFTER reimplementation on FPGA

Smonson wrote: ... but I tried compiling it for one of the smaller MAX V CPLDs and it fit easily. You could probably make a drop-in replacement at low cost. They work at 5v ...


Are you sure the MAX V family is 5V tolerant?
by ijor
Tue Aug 07, 2018 9:42 pm
Forum: Coding
Topic: SHIFTER reimplementation on FPGA
Replies: 78
Views: 6461

Re: SHIFTER reimplementation on FPGA

If I can find a copy of the 60Hz version somewhere, I'll download a copy and see if there are any timing discrepancies. I can send you an image if you want. But this is really not related to SHIFTER. It is just that the code assumes a fixed scan line length, 508 or 512 cycles in each case, when kee...
by ijor
Mon Aug 06, 2018 9:17 pm
Forum: Coding
Topic: SHIFTER reimplementation on FPGA
Replies: 78
Views: 6461

Re: SHIFTER reimplementation on FPGA

I will soon (it's midnight here) but it's definitely working at 50 and broken at 60. Maybe they released different versions of the program, or someone modified the copy I have...Here's the disk: Indeed, this version is the other way around than the one I know, that works correctly only on 60Hz. Int...
by ijor
Sun Aug 05, 2018 4:30 pm
Forum: MIDI Software and Hardware
Topic: Reading Atari Formatted discs
Replies: 7
Views: 350

Re: Reading Atari Formatted discs

I would be happy to pay someone to recover this data as, as far as I know, I have no other way to recover it short of (re)buying an ST which I'm trying to avoid doing. If the disc is simply unreadable, c'est la vie but if it is then it would be remiss of me not to attempt to get the data back someh...
by ijor
Sun Aug 05, 2018 3:06 pm
Forum: HxC Floppy Emulator
Topic: HxC External floppy cable, works as A and B
Replies: 40
Views: 16267

Re: HxC External floppy cable, works as A and B

Oh that sounds less PITA... I have two STE's - both with CA4003290 boards with square socketted 68000s... if that helps? On the STE it's usually changing straps, but they aren't usually populated. You still need to perform some minimal soldering. I'm not that familiar with the motherboard revisions...
by ijor
Sun Aug 05, 2018 2:39 pm
Forum: Coding
Topic: Different SHIFTER versions
Replies: 64
Views: 3611

Re: Different SHIFTER versions

I finally came around to fix my IMP board (I fried the Vsync diode somehow). -added traces for C070713-002 8833 low/mid 50Hz using a full IMP chipset board Many thanks once again. But something is odd with this new trace on low rez (any chance you mixed up and it is actually on med rez?). Can you m...
by ijor
Sun Aug 05, 2018 2:14 pm
Forum: Coding
Topic: SHIFTER reimplementation on FPGA
Replies: 78
Views: 6461

Re: SHIFTER reimplementation on FPGA

I will soon (it's midnight here) but it's definitely working at 50 and broken at 60. Maybe they released different versions of the program, or someone modified the copy I have. May be. No big deal anyway as long as your implementation matches what happens with an actual SHIFTER. Would be interestin...
by ijor
Sun Aug 05, 2018 1:36 pm
Forum: Coding
Topic: SHIFTER reimplementation on FPGA
Replies: 78
Views: 6461

Re: SHIFTER reimplementation on FPGA

The FPGA model has the same totally broken results as the physical shifter at 60Hz. Again, it should be the other way around. Please post the disk image you are using. Please make sure you are booting from that image (or physical disk) and not from another one so that it would be easy to compare an...

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