Search found 451 matches

by Dio
Sun Aug 17, 2014 4:36 am
Forum: Hardware
Topic: Memory access time
Replies: 50
Views: 5341

Re: Memory access time

A 32-bit RAM bus would have been the other option, with the 64MB video memory an option only enabled on the 1040 STs. That wouldn't have added a large cost (slightly more complex routing, doubling the size of the bus gateway, a 68-pin PLCC for the Shifter). Most problematic might have been 16x the ...
by Dio
Sun Aug 17, 2014 4:14 am
Forum: Hardware
Topic: Memory access time
Replies: 50
Views: 5341

Re: Memory access time

Regarding Amiga vs Atari, can see that both machines represents different ideas: game console vs power machine. Both computer has no any common feature, which in my opinion, competitors should have. This is looking at it with either A. the glasses of today or B. those of the hardware designer. That...
by Dio
Fri Aug 08, 2014 9:24 am
Forum: Hardware
Topic: Memory access time
Replies: 50
Views: 5341

Re: Memory access time

In case of ST, they did not make even much shorter 8 bits per pixel, palette based mode, what would allow 256 colors at once - it came first on TT. Because then whole concept of sharing RAM access between video and CPU would need 2x faster RAM. Another problem would be slower screen update in games...
by Dio
Fri Aug 08, 2014 9:19 am
Forum: Hardware
Topic: Memory access time
Replies: 50
Views: 5341

Re: Memory access time

Thinking about it, chunky alone might have been cheaper and easier since it saves six 16-bit latches. At any one instant you only really need the current word being fetched, the previous word that's being shifted, and a chunk of the previous word to index the palette. Very good point (and it saves ...
by Dio
Thu Aug 07, 2014 9:42 pm
Forum: Hardware
Topic: Memory access time
Replies: 50
Views: 5341

Re: Memory access time

Really, having coded a lot of demo effects both on ST and Amiga, I don't see many cases were interleaved bitplanes give an advantage. Fair enough. I'll take your word for it. Fundamentally bitplanes are mostly a crappy idea, especially if: - all your modes are power-of-2 bits per pixel - games are ...
by Dio
Wed Aug 06, 2014 9:42 am
Forum: Hardware
Topic: Memory access time
Replies: 50
Views: 5341

Re: Memory access time

looking at the traces above and i see lots of time skew the high to low delays and low to high are skewed past far past the quoted transitions of 1ns ~(lth-htl) delay the transitions are not clean and precise ye and whats the dodge dram write latch signal in the second trace ??? all down to control...
by Dio
Wed Jul 30, 2014 12:11 pm
Forum: Hardware
Topic: Memory access time
Replies: 50
Views: 5341

Re: Memory access time

I have traces from the basic STFM for reads from and writes to the various memory types. Here they are, but the read isn't commented. Looking at the trace I think the order is RAM, ROM, palette, sync, res, MFP with the ROM read at about 29us; you can see the CPU issuing the read (top half of the tra...
by Dio
Tue Jul 22, 2014 3:38 pm
Forum: Hardware
Topic: The LaST Upgrade - Part 15 - Bad DMA "fix"
Replies: 14
Views: 2391

Re: The LaST Upgrade - Part 15 - Bad DMA "fix"

From what I remember nobody had any issues with the proper Atari drives, it wasn't until 3rd party drives came out that the problems began. I suspect Atari drives used the slower 74xxx logic chips, and later 3rd party drives used 74LSxxx chips. Of course it could also mean Atari used 500ns micros, ...
by Dio
Tue Jul 22, 2014 12:35 pm
Forum: Coding
Topic: horizontal scrolling on ST
Replies: 564
Views: 64445

Re: horizontal scrolling on ST

I'd definitely focus on the C070523 rev C 1040STFs then. Actually I do have a couple of theories as to why: the simplest is that Atari saw some cheap crystals that were slightly out, and plumped for 'em; another is that someone misread / miswrote the number and they ended up with a batch of the wron...
by Dio
Mon Jul 21, 2014 5:24 pm
Forum: Coding
Topic: horizontal scrolling on ST
Replies: 564
Views: 64445

Re: horizontal scrolling on ST

The master clock crystal and derived CPU clock table is: PAL (all variants) 32.084988 8.021247 NTSC (pre-STE) 32.0424 8.0106 NTSC (STE) 32.215905 8.053976 Peritel (STE) (as PAL) 32.084988 8.021247 Some STFs 32.02480 8.0071 There aren't a lot of the 32.02480 ones around; the two I have data on are bo...
by Dio
Mon Jul 21, 2014 5:00 pm
Forum: Demos - General
Topic: The multi-monitor demo coding environment resurrected
Replies: 4
Views: 4224

Re: The multi-monitor demo coding environment resurrected

14" TV sets were however everywhere, but the picture quality wasn't sharp enough for serious months of all nighter demo coding. Naaaah, it was easily put up with :) . I coded the whole of Starball on a very, very cheap 14" portable. Even when I had a Falcon that portable TV was still my o...
by Dio
Mon Jul 14, 2014 6:56 am
Forum: Development
Topic: New disk image format STW
Replies: 50
Views: 9988

Re: New disk image format STW

Personally I think this is a wrong turn. I believe the solution to emulating all floppy commands is to have an IPS or .ST file as the main disk image, with a small associated overlay (contained in a separate file) which defines a set of overrides of the data to be applied when converting the track i...
by Dio
Tue Jul 08, 2014 8:17 am
Forum: Steem
Topic: slowing down the emulation
Replies: 3
Views: 2148

Re: slowing down the emulation

When you change emulation speed, some sort of 'sound problem' is inevitable. What sort of sound problem are you objecting to and what would you prefer?
by Dio
Thu Jun 26, 2014 10:22 am
Forum: Development
Topic: FD Timing/Protection Information Tools for emulators
Replies: 86
Views: 12436

Re: FD Timing/Protection Information Tools for emulators

I think I have an explanation for these 25-25 bytes : the DMA FIFO is in fact 2 FIFOs of 16 bytes, and DMA switches between each every 16 bytes. In case of reading, both FIFO start empty. but in case of writing, both FIFO are filled first (because the DMA doesn't seem able to use a FIFO to send dat...
by Dio
Tue Jun 10, 2014 3:06 pm
Forum: Hardware
Topic: When were the last STs really made?
Replies: 23
Views: 4081

Re: When were the last STs really made?

Did you take a pic of the motherboard too?
by Dio
Wed Jun 04, 2014 5:57 pm
Forum: Floppy Disk Preservation
Topic: Ways how SW testing copy protection
Replies: 115
Views: 16031

Re: Ways how SW testing copy protection

other interesting sequence 8888 = 00 ===> 4444 = AA ====> 2222 = 00 ====> 1111 = 55 ====> 8888 = 00 so 00 may become AA that may become 00 that may become 55 that may become 00 each time shifted Note that the 8888 / 2222 encodings for 00 aren't typical, they have missing clock pulses from the expec...
by Dio
Mon Mar 24, 2014 1:40 pm
Forum: SuperCard Pro Disk Copier
Topic: List of difficult to copy disks
Replies: 598
Views: 49105

Re: List of difficult to copy disks

The solution for both cases (STX, IPF etc.) is to have an overlay addendum carried in an adjacent file for sector writing. So you'd have blah.ipf and blah.ovl and the original file wouldn't be modified; the emulator detects sector writes and puts those into the overlay, and checks the overlay when a...
by Dio
Wed Feb 19, 2014 2:48 pm
Forum: SuperCard Pro Disk Copier
Topic: Floppy Emulator?
Replies: 22
Views: 4579

Re: Floppy Emulator?

It seems to me the obvious IO for a disk emulator is to read and write sectors to the disk. e.g. start the controller 'listening' with some predetermined simple strobe operation on the port A lines (say, toggle select, toggle side, toggle select) then read or write sector 127 to communicate. To pres...
by Dio
Wed Feb 19, 2014 9:37 am
Forum: Development
Topic: Emulator cycles
Replies: 2
Views: 2589

Re: Emulator cycles

You can also see this in the timing diagrams I stuck up. Exactly what the 'right' implementation for cycle 0 depends on the internal implementation. Where does the H counter get reset? When does the V counter increment? I thought I had a solid handle on this based on the vsync timing (much as you de...
by Dio
Wed Jan 29, 2014 2:29 pm
Forum: Hardware
Topic: can the video address point to cartridge port?
Replies: 16
Views: 1660

Re: can the video address point to cartridge port?

In Atari ST Internals they note that they brought DTACK to the outside and found that Glue generated a bus error anyway. I haven't checked this with the timing tester to see if it occurs earlier than the watchdog timer bus errors (the ones that occur in unmapped memory).
by Dio
Thu Jan 02, 2014 10:14 am
Forum: Coding
Topic: Cycle counts and phasing: tables and tester
Replies: 33
Views: 5519

Re: Cycle counts and phasing: tables and tester

I do have one but I'm not certain what state it's in at the moment (and it's not quite as complete as zexall). It's also very ST-only, but I could give you the source.

Send me a PM please.
by Dio
Wed Nov 06, 2013 12:33 pm
Forum: 680x0
Topic: Chaining a non-ISR routine to an ISR
Replies: 7
Views: 1694

Re: Chaining a non-ISR routine to an ISR

I don't think this is possible with any stack address tweak. If the interrupt comes in the middle of an OS call or during another interrupt, already in supervisor mode, you can't drop the S flag but still get it back at the end of the usermode ISR. You would have to drop the usermode flag, do the IS...
by Dio
Fri Nov 01, 2013 9:24 am
Forum: Coding
Topic: horizontal scrolling on ST
Replies: 564
Views: 64445

Re: horizontal scrolling on ST

It's not just the shift register becoming empty due to a failed transfer from the staging regs - it wouldn't give black, you'd see the border colour. I think the most likely possibilities are: - flipping to and from Mono mode for some reason - Glue flipping BLANK on and off - Problem reading the pal...
by Dio
Thu Oct 17, 2013 6:13 pm
Forum: Coding
Topic: horizontal scrolling on ST
Replies: 564
Views: 64445

Re: horizontal scrolling on ST

But the cathodic ray doesn't depend on HSYNC to go downward, its movement is continuous (I learnt that today), hence the scrolling effect. I would expect it to depend on the circuitry inside the TV - assuming it's a PLL, then you'll get a 'default period' HSYNC which will be about right, but not ex...
by Dio
Thu Oct 17, 2013 11:52 am
Forum: Hardware
Topic: Detailed STE DMA audio documentation?
Replies: 12
Views: 2516

Re: Detailed STE DMA audio documentation?

Correct about dividing from existing clock freq. What made STE incompatible with usual audio sample rates - troubles for usage. They saved 1 quartz clock generator, but could brag that have better samplerate than CD audios :mrgreen: I find the STE a very odd piece of hardware. Considering the limit...

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