Search found 51 matches

by sonycman
Fri Jan 10, 2020 5:04 pm
Forum: MiST
Topic: Work on the Minimig core?
Replies: 363
Views: 57705

Re: Work on the Minimig core?

slingshot wrote:I've updated the sources here:
https://github.com/mist-devel/minimig-mist/tree/dev
Hope I did it right.

Thanks a lot!
by sonycman
Fri Jan 10, 2020 2:17 pm
Forum: MiST
Topic: Work on the Minimig core?
Replies: 363
Views: 57705

Re: Work on the Minimig core?

tobiflex wrote:I have also change the line

Code: Select all

IF oddout=addr(0)  THEN

to:

Code: Select all

IF oddout=addr(0) AND memmaskmux(5 downto 4) = "00" THEN

This is important.

Oh, now i see! I'll check it out, thanks, Tobi!
by sonycman
Fri Jan 10, 2020 1:49 pm
Forum: MiST
Topic: Work on the Minimig core?
Replies: 363
Views: 57705

Re: Work on the Minimig core?

There are no zeros. This makes $1234 show up on the bus. Okay. So its better to have reliable mirroring than random data in higher byte, i agreed. I think this would be the right way. But we're going straight to the weekend. I can only test that on Sunday evening. Sorry ... This is exactly what i d...
by sonycman
Fri Jan 10, 2020 11:42 am
Forum: MiST
Topic: Work on the Minimig core?
Replies: 363
Views: 57705

Re: Work on the Minimig core?

Hi, I really don't remember :) But if you look in the changelog: 2016-02-09 - RK - BLITTER - blitter line mode fixed (fixes demos like SushiBoyz & Sunglasses by Ghostown, Vectorize by RSi, etc) Can you test those three mentioned demos? Hi Rok, nice to see you here! Just run through all of them ...
by sonycman
Fri Jan 10, 2020 8:37 am
Forum: MiST
Topic: Work on the Minimig core?
Replies: 363
Views: 57705

Re: Work on the Minimig core?

MasterOfGizmo wrote:Where does it provide the zero expand?

By original design TG68K doesn't miror bytes, and by changing data_write_mux it will mirror only even address access.
In odd addresses data bus will be zero extended beyond operand size.

This is exactly so at least when both operands are bytes, though.
by sonycman
Thu Jan 09, 2020 5:17 pm
Forum: MiST
Topic: Work on the Minimig core?
Replies: 363
Views: 57705

Re: Work on the Minimig core?

Changed blitter state machine, so that it performs first dot write to D pointer address and correctly increment it. agnus_blitter.v was modified so that these lines are added: wire lineinc = (bltcon1[4] && !bltcon1[2] || !bltcon1[4] && !bltcon1[3] && !sign_del) && ash...
by sonycman
Thu Jan 09, 2020 10:50 am
Forum: MiST
Topic: Work on the Minimig core?
Replies: 363
Views: 57705

Re: Work on the Minimig core?

slingshot wrote:So the remaining option is to debug it yourself :)

It appears that such a strange logic (with first pixel being written on D pointer address and all the others on C) is normal for Amiga blitter, so just to add pointer D increment logic looking as the best solution.
by sonycman
Thu Jan 09, 2020 10:02 am
Forum: MiSTer
Topic: Minimig (Amiga) core discussion
Replies: 1305
Views: 284801

Re: Minimig (Amiga) core discussion

BTW. There's a pretty new test-suite that uses bootable ADFs, and it looks quite interesting. https://github.com/dirkwhoffmann/vAmigaTS.git For the bus issue on 68020, I think the relevant material starts somewhere around page 73 in section 5.1.1: http://bitsavers.trailing-edge.com/components/motor...
by sonycman
Thu Jan 09, 2020 9:43 am
Forum: MiST
Topic: Work on the Minimig core?
Replies: 363
Views: 57705

Re: Work on the Minimig core?

Nope. That would only work in one of the two odd/even address cases where the upper byte has to show up on the lower bus halff. In the other case the lower byte has to show up on the upper half. https://github.com/mist-devel/mist-board/tree/master/tests/tg68k . Yes, that way mirroring only works in...
by sonycman
Wed Jan 08, 2020 3:53 pm
Forum: MiSTer
Topic: Minimig (Amiga) core discussion
Replies: 1305
Views: 284801

Re: Minimig (Amiga) core discussion

Brian the Lion has a second problem, a visual one this time: https://youtu.be/6T8i5fBVtN8 The issue is in the blitter, line drawing mode. The game cyclically activates the blitter almost without any reinitialization, relying on hardware automatic pointer increments. But in line drawing mode channel...
by sonycman
Wed Jan 08, 2020 3:40 pm
Forum: MiST
Topic: Work on the Minimig core?
Replies: 363
Views: 57705

Re: Work on the Minimig core?

MasterOfGizmo It works, the sound is good! But... this is additional layer of logic, which could worsen the timings. What if we change this: data_write_mux <= "--------"&data_write_muxin&"--------"; to this: data_write_mux <= "--------" & data_write_muxin &...
by sonycman
Wed Jan 08, 2020 2:14 pm
Forum: MiST
Topic: Work on the Minimig core?
Replies: 363
Views: 57705

Re: Work on the Minimig core?

MasterOfGizmo wrote:I did not have much time. This pull request is supposed to fix this:
https://github.com/TobiFlex/TG68K.C/pull/6

Thanks a lot! I`ll check it soon.
by sonycman
Tue Jan 07, 2020 10:08 pm
Forum: MiST
Topic: Work on the Minimig core?
Replies: 363
Views: 57705

Re: Work on the Minimig core?

slingshot wrote:Maybe TobiFlex willing to fix the byte-mirroring in 68000 mode if you open an issue. Not sure about the correct behaviour in 68020.
https://github.com/TobiFlex/TG68K.C

Yeah, thank you, that is the right way!
by sonycman
Mon Jan 06, 2020 3:49 pm
Forum: MiSTer
Topic: Minimig (Amiga) core discussion
Replies: 1305
Views: 284801

Re: Minimig (Amiga) core discussion

In reality, the 68000 mirrors the same byte to the upper and lower bits of the data bus on a byte write. TG68K doesn't do it? Definitely not: if BitField = 0 then if oddout = addr(0) then data_write_mux <= "XXXXXXXX" & "XXXXXXXX" & data_write_muxin; else data_write_mux <...
by sonycman
Mon Jan 06, 2020 12:47 pm
Forum: MiST
Topic: Work on the Minimig core?
Replies: 363
Views: 57705

Re: Work on the Minimig core?

The game Brian The Lion has bad music in the main menu, it is played wrong. Precisely, the audio channel 0 is distorted. In WinUAE (and on real hardware, I suppose) all is fine. It appears that the cause is minimig`s incompatibility in custom registers write access. The game updates audio channel 0 ...
by sonycman
Mon Jan 06, 2020 12:28 pm
Forum: MiSTer
Topic: Minimig (Amiga) core discussion
Replies: 1305
Views: 284801

Re: Minimig (Amiga) core discussion

The game Brian The Lion has bad music in the main menu, it is played wrong. Precisely, the audio channel 0 is distorted. In WinUAE (and on real hardware, I suppose) all is fine. It appears that the cause is minimig`s incompatibility in custom registers write access. The game updates audio channel 0 ...
by sonycman
Sat Jan 04, 2020 12:22 pm
Forum: MiSTer
Topic: Minimig (Amiga) core discussion
Replies: 1305
Views: 284801

Re: Minimig (Amiga) core discussion

knc wrote:Not sure how you are playing the game but if its whd then its a known issue on the bug tracker for whd games

I`am playing from ADF image, not whd.
So this is not fixed yet, I suppose?
Thanks for the information!
by sonycman
Sat Jan 04, 2020 10:52 am
Forum: MiSTer
Topic: Minimig (Amiga) core discussion
Replies: 1305
Views: 284801

Re: Minimig (Amiga) core discussion

I would appreciate, if somebody could check the Brian the Lion game. In the menu there is rotating solid blue word "BRIAN", which is becomes corrupted with the black stripes while rotating. Here is the video: https://www.youtube.com/watch?v=6T8i5fBVtN8 I`am using outdated november minimig ...
by sonycman
Fri Dec 13, 2019 4:20 pm
Forum: MiSTer
Topic: Minimig (Amiga) core discussion
Replies: 1305
Views: 284801

Re: Minimig (Amiga) core discussion

Why? It's just replacing sel_xram with |t_sel_slow in sel_reg. As far as I remember it worked before, because the data from the registers will have priority over the data which is read from RAM. With the proposed change, there will no unnecessary RAM access. It seems there is simple binary OR: assi...
by sonycman
Thu Dec 12, 2019 2:29 pm
Forum: MiSTer
Topic: Minimig (Amiga) core discussion
Replies: 1305
Views: 284801

Re: Minimig (Amiga) core discussion

Could it cause that the core doesn't run without Slow RAM? If yes, then you finally found that annoying bug :) I hope so :D At least now the kickstart runs on my xilinx board without a crash :o I guess, in real HW SlowRAM always starts from C0 regardless the size (like on Minimig), so if KS doesn't...
by sonycman
Thu Dec 12, 2019 12:12 am
Forum: MiSTer
Topic: Minimig (Amiga) core discussion
Replies: 1305
Views: 284801

Re: Minimig (Amiga) core discussion

You are welcome to provide fix. I suggest to edit gary.v that way: assign t_sel_slow[0] = cpu_address_in[23:19]==5'b1100_0 ? |memory_config[3:2] : 1'b0; //$C00000 - $C7FFFF assign t_sel_slow[1] = cpu_address_in[23:19]==5'b1100_1 ? memory_config[3] : 1'b0; //$C80000 - $CFFFFF assign t_sel_slow[2] = ...
by sonycman
Wed Dec 11, 2019 3:49 pm
Forum: MiSTer
Topic: Minimig (Amiga) core discussion
Replies: 1305
Views: 284801

Re: Minimig (Amiga) core discussion

sel_xram is zero when slow ram disabled in configuration, so sel_reg became a one with one of t_sel_slow[] together. When slow is disabled in config, this area is undefined. Generally speaking it doesn't matter what will be read from unallocated area. The kickstart autodetect available slow memory ...
by sonycman
Wed Dec 11, 2019 2:40 pm
Forum: MiSTer
Topic: Minimig (Amiga) core discussion
Replies: 1305
Views: 284801

Re: Minimig (Amiga) core discussion

assign sel_xram = ((t_sel_slow[0] & (memory_config[2] | memory_config[3])) | (t_sel_slow[1] & memory_config[3]) | (t_sel_slow[2] & memory_config[2] & memory_config[3])); assign sel_reg = cpu_address_in[23:21]==3'b110 ? ~(sel_xram | sel_rtc | sel_ide | sel_gayle) : 1'b0; sel_reg won'...
by sonycman
Wed Dec 11, 2019 10:27 am
Forum: MiSTer
Topic: Minimig (Amiga) core discussion
Replies: 1305
Views: 284801

Re: Minimig (Amiga) core discussion

I think I`ve found a bug in slow memory access mechanics. When CPU accesses slow memory address range (starting from $C00000), it being accessed no matter enabled or not in the configuration, as Gary asserts sel_slow signal and bankmapper module does not check for slow memory availability and assert...
by sonycman
Thu Dec 05, 2019 6:35 am
Forum: MiSTer
Topic: Minimig (Amiga) core discussion
Replies: 1305
Views: 284801

Re: Minimig (Amiga) core discussion

it's hard to explain just one line. It's part of whole optimization and migrating CPU to 28MHz domain. Ok. Another recent unmentioned commit was: denise: latch the pixel data later Was that the part of same optimization as well, or another bugfix? Ps: on ultrascale+ this core passes all the timings...

Go to advanced search