Search found 7 matches

by SKuRGe911
Tue Jun 04, 2019 1:42 am
Forum: MiSTer
Topic: Tutorial for the HPS_IO module
Replies: 7
Views: 1358

Re: Tutorial for the HPS_IO module

what i really need is a disk image with my files on it to load as needed. so i'm using petite fat for the software side of things. just gota figure out how i will format the disk image i need to mount.
by SKuRGe911
Tue Jun 04, 2019 12:45 am
Forum: MiSTer
Topic: Tutorial for the HPS_IO module
Replies: 7
Views: 1358

Re: Tutorial for the HPS_IO module

Thanks for the reply. Ive got the rom download working with ioctl lines. that works fine but when it comes to mounting the virtual disk image i'm not too sure how that works. Ive loaded an image but i'm not sure of how to format it to work with petite fat code. i was thinking i could mount the image...
by SKuRGe911
Sat Jun 01, 2019 4:24 am
Forum: MiSTer
Topic: Tutorial for the HPS_IO module
Replies: 7
Views: 1358

Tutorial for the HPS_IO module

Hi everyone. I am coding a personal project for fpga which will be like a computer that never existed. I'm having some trouble with the sdcard io. Using the code from the original MiST project doesn't seem to work for accessing an sd card. Could someone please explain how to use the interface proper...
by SKuRGe911
Wed Oct 17, 2018 12:50 am
Forum: MiSTer
Topic: simulation files for ddr3 memory
Replies: 7
Views: 1792

Re: simulation files for ddr3 memory

Thank you for your help. You wanted to know what i'm coding. I'm just experimenting with the zip cpu core trying to make a system as a computer that never would have existed. Its a 32 bit core so I would like the ddr3 ram to use in it. I was fooling around with the archi core's memory for sdram but ...
by SKuRGe911
Mon Oct 15, 2018 1:56 am
Forum: MiSTer
Topic: simulation files for ddr3 memory
Replies: 7
Views: 1792

Re: simulation files for ddr3 memory

Its not that i'm lazy. I am pretty new to fpga development. I tried to generate a test bench for vip and it didn't work. Could you point me in the direction of how to get or create a simulation for the ddr3 ram. With out it I cant go any further with my exploration of the MiSTer. Any help would be h...
by SKuRGe911
Wed Oct 10, 2018 1:27 am
Forum: MiSTer
Topic: simulation files for ddr3 memory
Replies: 7
Views: 1792

simulation files for ddr3 memory

Does anyone have a ddr3 verilog or VHDL simulation file for the ram that is on the de10 nano or more specifficly the interface that the ddr3 has with the MiSTer system. Ive found some generic ones but they have many other pins on them which the MiSTer doesn't use.
Any help i would be grateful.
by SKuRGe911
Wed Sep 19, 2018 1:12 am
Forum: MiSTer
Topic: is there a simulator file for the sdram used on mister?
Replies: 1
Views: 814

is there a simulator file for the sdram used on mister?

Just wondering if there was a verilog or VHDL simulator file for the sdram board on the MiSTer. I have one for the ram used in the mist. could this be used in its place if there is none? cause they seem to have the same basic commands bitwise.

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